Common Through Chip Via Multiplexing for Stacked Semiconductor Chips
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Solution Overview
Problem
Conventional semiconductor integrated circuits require a large number of through chip vias to interface multiple signals between master and slave chips, leading to increased size and reduced die area due to the need for individual vias for each signal, which complicates fabrication and increases current consumption and signal delay.
Innovation Solution
Implementing a semiconductor integrated circuit with a multiplexer on the master chip and a demultiplexer on the slave chip, both connected via a common through chip via that multiplexes and demultiplexes signals based on operation modes, reducing the number of through chip vias needed by enabling multiple signals to be transferred through a single interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If individual through chip vias are used for each signal between master and slave chips, then signal transfer reliability is improved, but the number of vias increases leading to increased device size and reduced die area
Solution Approach 1:
Multiple individual through chip vias that were previously used for different signals are merged into a single common through chip via. The master chip includes a multiplexer that combines multiple signals into one signal path, and the slave chip includes a demultiplexer that separates the combined signal back into individual signals, allowing multiple signals to share a single via structure.
Solution Approach 2:
The common through chip via is designed to handle multiple different signals at different times through time-division multiplexing. The via structure itself becomes universal, capable of transmitting any of the multiple signals by switching control, rather than requiring dedicated vias for each signal type.
2Adaptability or versatility
If multiple through chip vias are implemented to interface multiple signals, then signal transfer capability is improved, but device complexity and fabrication difficulty increase
Solution Approach 1:
The fabrication process for multiple individual vias is replaced by a single via formation process. The multiplexer and demultiplexer circuits are integrated into the chip designs, allowing the same physical via structure to serve multiple signal paths through electronic switching rather than requiring separate physical via structures for each signal.
Solution Approach 2:
The common through chip via structure is designed as a universal interface that can handle multiple different signal types and configurations. The adaptability is achieved through the multiplexer/demultiplexer circuit logic rather than through multiple specialized via structures, simplifying the fabrication process while maintaining versatility.
3Speed
If multiple through chip vias are used for signal transfer, then current consumption increases, but signal transfer speed may be improved
Solution Approach 1:
The multiplexer switches between different signal paths in a periodic or time-division manner, allowing multiple signals to share a single via by allocating different time slots to different signals. This periodic switching enables efficient use of the single via resource while maintaining signal transfer capability for multiple channels.
Solution Approach 2:
Multiple signal paths are merged into a single physical via structure, reducing the total number of active via connections. The multiplexer combines multiple input signals into a single output signal that travels through the common via, thereby reducing the cumulative current consumption that would occur if separate vias and their associated circuitry were used for each signal.
Data Source
AI summary
A semiconductor integrated circuit includes a first semiconductor chip including a first output circuit which is enabled in a first operation mode and outputs a first output signal and a second output circuit which is enabled in a second operation mode and outputs a second output signal; a second semiconductor chip including a first input circuit which is enabled in the first operation mode and receives the first output signal and a second input circuit which is enabled in the second operation mode and receives the second output signal; and a common through chip via arranged to vertically penetrate through the semiconductor chip, be coupled with the first and second output circuits in one end and coupled with the first and second input circuits in the other end, and interface transfer of the first and second output signals which are enabled in different operation modes, including the first and second operation modes.