Common-Voltage Multi-Write Non-Volatile Memory Array Without Decoders

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Solution Overview

Problem

The decoder in non-volatile memory arrays increases the overall area, which is a challenge in existing CMOS technology for fabricating ASICs.

Innovation Solution

A small-area common-voltage multi-write non-volatile memory array is designed with coupled common-voltage lines, reducing the number of decoders and overall area by directly connecting these lines to the memory cells without passing through decoders.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If decoders are used to transmit programming signals to memory cells, then the memory array can be programmed correctly, but the overall area of the memory array increases

Engineering Contradiction:

Improveprogramming signal transmissionVSAvoidmemory array area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts and removes the decoder component from the memory array architecture. Instead of using decoders to transmit programming signals, the invention directly connects word lines and bit lines to memory cells, eliminating the need for decoders and thereby reducing the overall area while maintaining programming functionality

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The common-voltage lines serve multiple functions: they provide voltage reference for memory cells, enable direct signal transmission to multiple memory cells simultaneously, and replace the traditional decoder functionality. This multi-functionality allows the memory array to operate correctly without dedicated decoder circuits

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Area of stationary object

If the number of decoders is reduced, then the overall area is reduced, but the complexity of direct coupling increases

Engineering Contradiction:

Improvememory array areaVSAvoiddirect coupling complexity

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent merges the functions of decoders into the common-voltage line network. By combining voltage reference, signal distribution, and cell selection functions into a unified direct coupling architecture, the system reduces component count while managing complexity through functional integration rather than multiplication of separate components

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS12446219B2Small-area common-voltage multi-write non-volatile memory array

Publication Date: 2025.10.14 YIELD MICROELECTRONICS CORP

AI summary

A small-area common-voltage multi-write non-volatile memory array includes word lines, select lines, common-voltage lines, and sub-memory arrays. The word lines include a first word line and a second word line. The select lines include a first select line. The common-voltage lines are directly coupled together. The common-voltage lines include a first common-voltage line and a second common-voltage line. Each sub-memory array includes a first non-volatile memory cell coupled to the first word line, the first select line, and the first common-voltage line and a second non-volatile memory cell coupled to the second word line, the first select line, and the second common-voltage line.