5G Communication Circuit Control Using Paging–SS/PBCH Timing

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Solution Overview

Problem

In 5G communication systems, the power consumption of communication circuitry increases due to the prolonged interval between receiving a synchronization signal/physical broadcast channel (SS/PBCH) block and a paging message, as the transmission periodicities differ, leading to inefficient power management.

Innovation Solution

An electronic device is equipped with a communication processor that identifies the reception times of a paging message and an SS/PBCH block, determining the activation time of the communication circuitry based on a specified condition, allowing the device to temporarily store the message or data and process it using the SS/PBCH block received after the paging message, thereby maintaining an inactive state between receptions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the communication circuitry is maintained in an active state until reception of a paging message after receiving the SS/PBCH block, then the paging message can be decoded using the reference signal from the SS/PBCH block, but the power consumed by the communication circuitry increases due to the prolonged active state

Engineering Contradiction:
Improvepaging message decoding reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The device performs preliminary action by receiving and decoding the SS/PBCH block in advance to obtain the reference signal, then stores this reference signal for later use. This allows the device to maintain an inactive state between SS/PBCH reception and paging message reception, reducing power consumption while ensuring the reference signal is available when needed for paging message decoding

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The device dynamically adjusts the activation time of communication circuitry based on the interval between SS/PBCH block reception and paging message reception. When the interval is long, the device can safely deactivate the circuitry after SS/PBCH processing and reactivate only when the paging message is received, optimizing the balance between decoding reliability and power consumption

Inventive Principle:
Principle #15Dynamics

2Reliability

If the transmission periodicity of SS/PBCH block is different from the transmission periodicity of paging message, then the SS/PBCH block can be received with designated periodicity for synchronization, but the interval between receiving SS/PBCH block and paging message becomes lengthened

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoidinterval duration
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The device receives the SS/PBCH block in advance with its designated periodicity to ensure proper synchronization, stores the reference signal, and then maintains an inactive state during the extended interval until the paging message is received. This preliminary reception of SS/PBCH block ensures synchronization reliability without requiring continuous active state throughout the extended interval

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The device utilizes the periodic transmission of SS/PBCH blocks to establish synchronization timing, then leverages this periodic structure to manage power consumption during the extended intervals between SS/PBCH receptions and paging message receptions

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS12376070B2Electronic device for controlling communication circuit based on reception interval between SS/PBCH block and data and method for the same
Publication Date: 2025.07.29 SAMSUNG ELECTRONICS CO LTD
  • US12376070B2 patent drawing
  • US12376070B2 patent drawing
  • US12376070B2 patent drawing

AI summary

In an electronic device and an operation method thereof, the electronic device may include: a memory; communication circuitry configured to transmit and receive data via a node; and a communication processor, wherein the communication processor may be configured to: identify a first time of receiving a paging message and a second time of receiving a synchronization signal/physical broadcast channel (SS/PBCH) block; determine, based on the first time and the second time satisfying a specified condition, the activation time of the communication circuitry based on the reception time of the paging message; receive a paging message; temporarily store the received paging message in the memory; and process the stored paging message based on an SS/PBCH block received after reception of the paging message.