Communication Device Clock Control Circuit
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Solution Overview
Problem
Communication devices face challenges in generating precise clocks without using bulky crystal oscillators, as in-chip oscillation circuits fail to provide the necessary precision, especially in compact and lightweight electronic products.
Innovation Solution
A control circuit and method that utilize a periodic packet detection circuit, frequency synthesis circuit, and setting value generating circuit to generate a high-precision working clock based on a reference clock, adjusting the frequency to match a predetermined multiple of the packet indication signal, eliminating the need for crystal oscillators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If in-chip oscillation circuits are used instead of crystal oscillators, then the device volume is reduced, but the clock precision deteriorates
Solution Approach 1:
The patent introduces a frequency synthesis circuit as an intermediary component that takes the low-precision reference clock from the in-chip oscillation circuit and transforms it into a high-precision working clock by locking it to the periodic packet signal. This mediator resolves the contradiction by decoupling the volume benefit of in-chip oscillators from the precision requirement through an additional frequency transformation stage.
Solution Approach 2:
The patent changes the frequency parameter of the clock signal through the frequency synthesis circuit, which adjusts the working clock frequency to be a predetermined multiple of the packet indication signal frequency. This parameter transformation allows the system to achieve high precision without relying on the physical properties of crystal oscillators.
2Measurement precision
If crystal oscillators are used to ensure precise clocks, then the clock precision is improved, but the device volume increases
Solution Approach 1:
The patent extracts the frequency reference function from the physical crystal oscillator and implements it through software-controlled frequency synthesis. By taking out the essential function (frequency reference) from the bulky crystal oscillator hardware, the system achieves the same precision benefit without the volume penalty.
Solution Approach 2:
The patent replaces the mechanical crystal oscillator system with an electronic frequency synthesis system. The mechanical resonance-based crystal oscillator is substituted with an electronic phase-locked loop and frequency synthesis circuitry, eliminating the need for bulky physical components while maintaining precision through electronic control.
3Ease of manufacture
If in-chip oscillation circuits are used for compact design, then the ease of manufacture is improved, but the reliability of clock precision deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where the periodic packet signal serves as a reference to continuously adjust and lock the working clock frequency. This feedback loop ensures that despite using simple in-chip oscillators, the system maintains reliable and precise clock operation by constantly correcting deviations through comparison with the periodic packet reference.
Data Source
AI summary
A control circuit of a communication device includes: a periodic packet detection circuit, detecting a periodic packet of a data signal to generate a packet indication signal corresponding to the periodic packet; a frequency synthesis circuit, coupled to the periodic packet detection circuit, generating a working clock according to a reference clock; and a setting value generating circuit, coupled to the periodic packet detection circuit, generating a setting value according to a relationship between the frequencies of the working clock and the packet indication signal. The frequency synthesis circuit further adjusts the working clock according to the setting value to cause the frequency of the working clock to substantially be a predetermined multiple of the frequency of the packet indication signal.