Compact Branchline Coupler Using Slow Wave Transmission Lines

The patent transitions from conventional planar transmission lines to vertically stacked multi-layer transmission line structures. By utilizing the third dimension (vertical stacking of signal layers and ground planes), the design achieves lower equivalent series inductance and reduced parasitic effects without compromising on-chip integrability. This dimensional change allows signals to couple through multiple layers, reducing the impact of substrate losses and parasitic capacitances.

The patent employs composite transmission line structures combining multiple metal layers, dielectric layers, and ground planes in a stacked configuration. This composite architecture creates distributed inductance and capacitance networks that compensate for parasitic effects. The multi-layer composite structure effectively reduces equivalent series inductance while maintaining impedance control, thereby reducing energy losses at high frequencies.

The patent utilizes vertical stacking of transmission line layers to achieve compact area footprint. By routing signals through multiple vertical layers rather than spreading them out horizontally, the design fits quarter-wavelength transmission lines into a much smaller planar area. The multi-layer configuration allows overlapping of signal paths in the vertical dimension, dramatically reducing the required chip area while maintaining the necessary electrical length.

The patent implements nested transmission line structures where signal layers are positioned between ground planes in a compact stacked arrangement. The transmission lines are nested within the vertical space defined by multiple metal layers and dielectric substrates, allowing the coupler structure to be contained within a small footprint. This nesting approach packs the required electrical length into a compact three-dimensional volume.

The patent uses composite multi-layer transmission line structures to mitigate parasitic capacitances that arise from miniaturization. The stacked configuration of signal layers and ground planes creates distributed capacitance networks that compensate for increased parasitic effects in compact geometries. The composite structure provides controlled impedance matching and reduces the impact of fringing fields and substrate coupling that become significant at reduced dimensions.

By moving to vertical stacking in the third dimension, the patent reduces the horizontal dimensions without proportionally increasing parasitic capacitances. The vertical separation between signal layers and ground planes provides electrical isolation that limits parasitic coupling, while the compact horizontal footprint is achieved through efficient use of vertical space. This dimensional transition allows miniaturization without the same penalty of increased parasitic effects.