Compact Delay Locked Loop With Coarse-Fine Timing Alignment
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Solution Overview
Problem
Existing delay locked loops (DLLs) face challenges in accurately adjusting signal timing due to limitations in controlling the delay of delay circuits, which can lead to misalignment of signals in data interfaces and other applications.
Innovation Solution
A DLL system that includes a delay circuit, phase detector, and delay control circuit, where the delay is controlled using both coarse and fine delay signals, allowing for precise adjustment of signal timing through a method involving sweeping of these signals to achieve phase lock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a delay circuit is used to adjust signal timing, then signal alignment is improved, but control precision over wide frequency ranges deteriorates
Solution Approach 1:
The delay circuit is divided into multiple delay stages (first delay stage, second delay stage, etc.), each contributing to the total delay. This segmentation allows independent control and optimization of each stage, enabling precise timing adjustment across wide frequency ranges by coordinating the delay of individual stages rather than relying on a single delay element.
2Ease of operation
If delay control is simplified, then ease of operation is improved, but manufacturing precision of delay adjustment deteriorates
Solution Approach 1:
The delay circuit incorporates dynamically controllable elements such as variable resistors or capacitors that can be adjusted based on operating conditions. This dynamic adjustment capability allows the delay to be precisely tuned for different frequency ranges and applications, maintaining high precision while remaining adaptable to various operational requirements.
Data Source
AI summary
A delay buffer includes a delay device having an input, an output, and a current terminal. The delay buffer also includes a current circuit coupled between a rail and the current terminal. The current circuit includes transistors and switches. Each one of the switches is coupled in series with a respective one of the transistors between the rail and the current terminal.