Compact Wideband Doherty Amplifier Layout Using Capacitive Lines
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Solution Overview
Problem
Doherty amplifiers require additional physical space due to their design, which is not compatible with standard rack dimensions, leading to inefficiencies and increased cooling and energy consumption, and existing methods to reduce size compromise efficiency or linearity.
Innovation Solution
Reduce the physical length of phase-shifting lines in Doherty amplifiers by adding capacitors in series or parallel to transmission lines while maintaining electric length, allowing for reduced plan width without compromising efficiency or linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If Doherty amplifier configuration is used to increase efficiency, then amplification efficiency is improved (exceeding 45%), but physical space occupation increases making it incompatible with standard rack dimensions
Solution Approach 1:
The patent changes the electrical parameters of transmission lines by adding series or parallel capacitors to modify the electrical length while reducing physical length. This allows the Doherty amplifier to maintain its efficiency-enhancing electrical characteristics (90-degree phase shift, impedance transformation) with a compact physical footprint that fits standard rack dimensions
Solution Approach 2:
The patent transitions from optimizing physical dimensions to optimizing electrical dimensions. By using capacitive loading to achieve the required electrical length and phase shift, the amplifier maintains its functional performance while reducing physical space occupation from incompatible large dimensions to rack-compatible small dimensions
2Area of stationary object
If physical length of transmission lines is reduced to meet rack constraints, then space occupation is reduced, but electrical length and phase shift accuracy may be compromised
Solution Approach 1:
The patent introduces capacitors as intermediary elements between the transmission line sections. These capacitors serve as mediators that provide the additional electrical length and phase shift that would otherwise require longer physical transmission lines, thereby maintaining electrical length accuracy while reducing physical plan width
Solution Approach 2:
The patent modifies the electrical parameters of the transmission network by adding capacitive elements. This changes the electrical length and phase characteristics without proportionally increasing physical length, allowing precise control of electrical parameters independent of physical dimensions
3Ease of manufacture
If standard transmission lines are used without modification, then manufacturing is simpler, but phase shift accuracy and impedance matching deteriorate in compact designs
Solution Approach 1:
The patent segments the transmission line into multiple sections with capacitive elements inserted between them. This segmentation allows independent optimization of each section's electrical characteristics, maintaining phase shift accuracy and impedance matching even though the overall structure becomes more complex than a simple continuous transmission line
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Achieves a compact Doherty amplifier design that meets standard rack constraints while maintaining high efficiency and linearity, reducing energy consumption and cooling requirements.
Implementation Method 1
adding capacitors in series or parallel to transmission lines while maintaining electric length
Data Source
Figure 1a
Figure 1b
Figure 1c~1d
AI summary
The invention consists of a method for making a wideband Doherty amplifier (10,10') with reduced plan width, said amplifier comprising a signal source (1) for generating an input signal (2), a hybrid coupler (3) adapted to receive said input signal (2) and divide it into first and second output signals (4,5) phase-shifted by 90°, a carrier amplifier (6,6'), a peak amplifier (8,8'), an output network (15,15') and a delivery node (11) adapted to be connected to a load (12), said output network (15,15') comprising a recombination node (9) adapted to receive the signals output by said carrier amplifier (6,6') and said peak amplifier (8,8'), and a transmission line (7,13,13',14) implemented as a printed circuit track, wherein capacitors are inserted on said track to compensate for the non-ideality characteristics of the semiconductor used for making said line (7).