Compact Fuse Box Design for Semiconductor Integrated Circuits
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Solution Overview
Problem
Conventional semiconductor integrated circuits face increased defect rates due to higher device density, leading to inefficient yield as the area required for fuse boxes and redundancy circuits expands, making it difficult to reduce the fuse box area without compromising laser alignment and wire routing.
Innovation Solution
A small-sized fuse box design with fuse sets arranged in two rows within a column fuse block, allowing for reduced area usage by integrating fuse sets and eliminating the need for wires along the circumference, thereby reducing the overall area and enhancing defect information storage efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of devices in semiconductor integrated circuits is increased to improve integration density, then productivity is improved, but the frequency of defects increases leading to worsened yield
Solution Approach 1:
The fuse box is divided into multiple fuse sets arranged in two rows, with each fuse set independently connected to redundancy circuits. This segmentation allows for localized defect management and more efficient use of fuse box area, enabling better yield improvement without increasing overall area
Solution Approach 2:
The fuse sets are arranged in a two-row configuration rather than a single row or conventional layout. This dimensional reorganization optimizes the use of available space, reduces the required fuse box area, and improves the efficiency of defect information storage and retrieval
2Productivity
If the area of the fuse box is reduced to improve integration efficiency, then productivity is improved, but it becomes difficult to maintain laser alignment tolerance and wire routing requirements
Solution Approach 1:
The fuse box area is reduced by segmenting fuse sets into two rows and optimizing their arrangement. This segmentation allows for compact layout while maintaining adequate spacing between adjacent fuses to ensure laser alignment tolerance is met, achieving both area reduction and manufacturing precision
Solution Approach 2:
The fuse box layout parameters are optimized by arranging fuse sets in two rows with specific spacing. This parameter optimization reduces the required area while maintaining the minimum pitch between fuses needed for laser alignment, achieving compact design without compromising manufacturing precision
3Reliability
If wires are routed along the circumference of the fuse box to prevent electrical interference, then reliability is improved, but the area of the fuse box increases
Solution Approach 1:
The wire routing is extracted from the conventional circumferential path and repositioned to run between the two rows of fuse sets. This extraction eliminates the need for large circumferential wires, reducing the fuse box area while maintaining electrical interference prevention through adequate wire spacing
Solution Approach 2:
The wire routing configuration is changed from a circumferential two-dimensional path to a linear path between fuse set rows. This dimensional change in wire arrangement reduces the required fuse box area while maintaining sufficient wire separation to prevent electrical interference
Data Source
AI summary
Disclosed are a fuse box and a semiconductor integrated circuit having the same. The semiconductor integrated circuit includes a plurality of banks, column control blocks, and column fuse blocks. The plurality of banks including a plurality of mat rows and mat columns. The banks are arranged in row and column directions and disposed away from each other. The column control blocks are disposed in a space between the banks which are extended to the column direction. The column fuse blocks are disposed adjacent to the column control blocks and have a plurality of fuse boxes. The fuse boxes include fuse sets arranged in two rows. The fuse boxes are disposed to correspond to the one mat column. Each fuse box has an interconnection fuse and address fuses which are arranged with a constant interval and are the same type.


