Compact Hybrid Table for NV Memory Access Management
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Solution Overview
Problem
Current memory device access management is complicated, especially with Flash memory, due to insufficient RAM storage capacity, leading to inefficiencies and potential side effects in existing solutions.
Innovation Solution
A method and apparatus that utilize a compact hybrid table with compressed tables to enhance reading performance by transmitting this table to a host device, allowing for efficient reading requests through dedicated bit information, enabling faster data retrieval from non-volatile memory by determining mapping relationships and accessing data based on logical and physical addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If RAM storage capacity is increased to improve memory access management, then reading performance is improved, but device complexity and cost increase
Solution Approach 1:
The patent segments the address mapping functionality by dividing the mapping table into multiple parts stored in different locations (host device and memory device), allowing the system to maintain high reading performance without requiring large amounts of RAM in the memory device
Solution Approach 2:
The patent introduces an intermediary mechanism where the host device participates in storing and managing parts of the mapping table, reducing the burden on the memory device's RAM while maintaining efficient address translation for reading operations
2Measurement precision
If mapping table size is increased to improve address translation accuracy, then reading performance is improved, but transmission time and communication overhead increase
Solution Approach 1:
The mapping table is segmented into multiple parts distributed between the host device and memory device, allowing comprehensive address translation capability without requiring complete table transmission for every operation
Solution Approach 2:
The mapping table parts are pre-transmitted and stored in appropriate locations before reading operations occur, so that address translation can proceed quickly without real-time computation delays
Data Source
AI summary
A method and associated apparatus for performing access management of a memory device with aid of dedicated bit information are provided. The method includes: transmitting a compact hybrid table comprising multiple compressed tables to a host device, for being stored in the host device, to allow the host device to send one of multiple compact hybrid table entries of the compact hybrid table to the memory device as reading reference; determining a starting logical address and a data length according to a read command packet from the host device, and determining a first mapping relationship and the dedicated bit information according to the read command packet; determining second mapping relationship(s) according to the first mapping relationship and the dedicated bit information; and reading the data from the NV memory for the host device at least according to the first mapping relationship and the second mapping relationship(s).