Compact Semiconductor Memory with Reduced Contacts

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Solution Overview

Problem

There is a need for semiconductor memory devices that are smaller in size than currently existing devices, as conventional DRAM cells face challenges in scaling due to the necessity of maintaining capacitance value and require periodic refresh operations.

Innovation Solution

The development of a semiconductor memory device with an integrated circuit that includes a link or string of semiconductor memory cells, each with a floating body region for data storage, connected in series or parallel, and featuring a reduced number of contacts, allowing for a compact memory array with shared conductive regions and a gate insulated from the floating body region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If conventional DRAM cell structure (1T/1C) is used, then data storage capability is maintained, but device size cannot be scaled down further due to capacitance maintenance requirements

Engineering Contradiction:
Improvememory cell sizeVSAvoiddata storage reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent extracts and removes the capacitor component from the conventional 1T/1C DRAM cell structure, creating a capacitor-less memory cell that uses a floating body region to store data. This extraction eliminates the space requirement for the capacitor while maintaining data storage capability through the floating body effect, directly resolving the contradiction between miniaturization and data storage reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the physical parameters of the memory cell by introducing a floating body region with specific electrical characteristics. The floating body region's charge state (positive or negative) represents binary data, replacing the traditional capacitor charge storage mechanism. This parameter change enables smaller cell size while maintaining reliable data storage through the unique electrical properties of the floating body structure.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If conventional DRAM cell structure is used, then data storage is achieved, but periodic refresh operations are required increasing device complexity

Engineering Contradiction:
Improverefresh operation requirementVSAvoidmemory state maintenance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The floating body memory cell structure inherently maintains its data state through the stable charge distribution in the floating body region. The structure self-maintains the memory state without requiring external refresh operations, as the floating body's charge state is stable and does not decay like capacitor charge. This self-service characteristic eliminates the need for complex refresh circuitry and operations.

Inventive Principle:
Principle #25Self-service

3Ease of manufacture

If number of contacts per memory cell is reduced, then manufacturing complexity decreases, but electrical connection reliability may be affected

Engineering Contradiction:
Improvecontact formation complexityVSAvoidelectrical connection stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent merges multiple memory cells into a shared string structure where a single contact serves multiple cells simultaneously. The first contact connects to the first conductivity type regions of multiple memory cells in series, and the second contact connects to the second conductivity type regions. This merging reduces the total number of contacts required while maintaining reliable electrical connections through the shared contact architecture.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables a smaller cell size and reduced number of contacts, facilitating efficient data storage and retrieval while maintaining the memory state without the need for periodic refresh operations, thus addressing the scaling challenges of conventional DRAM cells.

Implementation Method 1

each memory cell comprises a floating body region for storing data

Methodology Applied
Scientific EffectCharge accumulation: Electrical Accumulator

Data Source

PatentUS10347636B2Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
Publication Date: 2019.07.09 EXACTOJOIN LLC
  • US10347636B2 patent drawing
  • US10347636B2 patent drawing
  • US10347636B2 patent drawing

AI summary

An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The link or string includes at least one contact configured to electrically connect the memory cells to at least one control line, and the number of contacts in the string or link is the same as or less than the number of memory cells in the string or link.