Compact Optical Transceiver Hybrid Multichip Integration
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Solution Overview
Problem
Current optical transceivers face challenges in achieving high-speed data transmission due to limitations in bandwidth and signal integrity, primarily caused by the side-by-side placement of components on PCBs, which leads to increased board area consumption and electrical losses from wirebonds, making it difficult to shrink product size and maintain signal integrity at high frequencies.
Innovation Solution
The implementation of a hybrid multichip integration using silicon photonics with die-stacked drivers coupled by passive TSV interposers, eliminating wirebonds and optimizing bump designs for reduced parasitic capacitance and improved signal transmission, allowing for compact, high-speed optical transceivers with enhanced yield and flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If side-by-side placement of components is used on PCB, then ease of manufacture is improved, but device area and electrical loss increase
Solution Approach 1:
The patent transitions from 2D side-by-side component placement on PCB to 3D vertical stacking architecture. Multiple functional layers (optical layer, electrical layer, interconnection layer) are stacked vertically to achieve compact integration while maintaining manufacturing feasibility through standardized layer stacking processes.
Solution Approach 2:
The patent implements nested integration where electrical components are embedded within or alongside optical components. The electrical layer is positioned within the vertical structure of the optical module, creating a compact nested arrangement that reduces overall device footprint while maintaining ease of manufacture through modular assembly.
2Ease of manufacture
If wirebonds are used for electrical interconnection, then ease of manufacture is improved, but signal integrity and bandwidth deteriorate at high frequencies
Solution Approach 1:
The patent replaces the mechanical wirebond interconnection system with direct electrical contact through vertical vias and conductive traces integrated into the substrate. This substitution eliminates the mechanical wirebond structure that causes inductance and signal degradation, while maintaining electrical connectivity through integrated conductive pathways.
Solution Approach 2:
The patent introduces an intermediate conductive layer structure that mediates between electrical components and optical components. This intermediate layer provides direct electrical contact paths through vertical vias, replacing the wirebond intermediary and enabling high-frequency signal transmission with improved integrity.
3Ease of manufacture
If side-by-side component placement is used, then ease of manufacture is improved, but electrical loss and inductance increase
Solution Approach 1:
The patent reduces electrical loss by transitioning to vertical stacking architecture, which significantly shortens the horizontal electrical transmission paths. The vertical via connections provide direct current paths, minimizing resistive losses and inductive effects associated with long horizontal traces required for side-by-side component placement.
4Area of stationary object
If compact integration is pursued, then device area is reduced, but manufacturing complexity and yield issues increase
Solution Approach 1:
The patent segments the optical module into distinct functional layers (optical layer, electrical layer, interconnection layer) that can be manufactured and tested independently before final assembly. This segmentation reduces manufacturing complexity by allowing specialized processing for each layer while achieving compact integration through vertical stacking.
Solution Approach 2:
The patent implements a universal substrate structure that serves multiple functions: providing mechanical support, enabling vertical interconnection through vias, facilitating heat dissipation, and allowing integration of both optical and electrical components. This multi-functionality reduces overall device complexity while achieving compact footprint.
Data Source
AI summary
A compact optical transceiver formed by hybrid multichip integration. The optical transceiver includes a Si-photonics chip attached on a PCB. Additionally, the optical transceiver includes a first TSV interposer and a second TSV interposer separately attached nearby the Si-photonics chip on the PCB. Furthermore, the optical transceiver includes a driver chip flip-bonded partially on the Si-photonics chip through a first sets of bumps and partially on the first TSV interposer through a second sets of bumps. Moreover, the optical transceiver includes a transimpedance amplifier module chip flip-bonded partially on the Si-photonics chip through a third sets of bumps and partially on the second TSV interposer through a fourth set of bumps.