Comparator Auto-Zero Tuning for Noise and Offset Suppression
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Low power integrated circuits, particularly in IoT applications, face challenges with comparator circuits due to input noise and offset, which are exacerbated by the need to reduce power consumption and adapt analog-to-digital conversion efficiently.
Innovation Solution
An error detector circuit with a dynamic, time-varying filter response is connected to the comparator output to detect and compensate for noise or offset, operating during auto-zero modes or post-bit trials, allowing for tuning of the comparator circuit to minimize errors, even when it is turned off between comparisons.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a dynamic comparator circuit is turned off between comparisons to reduce power consumption, then power consumption is reduced, but noise and offset compensation becomes more difficult
Solution Approach 1:
The auto-zero circuit performs noise and offset compensation in advance during dedicated auto-zero phases before the comparator is needed for normal operation. This preliminary action allows the system to compensate for errors when the comparator is still active, then turn off the comparator between comparisons to save power, while retaining the benefit of the pre-performed compensation.
Solution Approach 2:
The system alternates between auto-zero phases and comparison phases in a periodic manner. During auto-zero phases, the comparator is active and performs self-calibration to compensate for noise and offset. During comparison phases, the comparator operates normally. Between these phases, the comparator can be turned off to reduce power consumption, while the periodic auto-zeroing ensures continuous compensation capability.
2Measurement precision
If auto-zeroing techniques are applied to a dynamic comparator circuit that is turned off between comparisons, then noise and offset are reduced, but the complexity of the comparator circuit increases
Solution Approach 1:
The auto-zero circuit is integrated within the comparator structure, sharing common components such as the differential input stage and feedback mechanisms. This merging approach allows noise and offset compensation functionality to be added without requiring completely separate compensation circuits, thereby reducing the overall complexity increase while achieving improved measurement precision.
3Speed
If the comparator operates continuously to maintain readiness for comparisons, then response speed is improved, but power consumption increases
Solution Approach 1:
The auto-zero circuit performs compensation in advance during dedicated phases, so when the comparator is activated for comparisons, it is already calibrated and ready to operate immediately at full speed. This preliminary calibration action eliminates the need for continuous operation to maintain readiness, allowing the comparator to be turned off between comparisons without sacrificing response speed during actual comparison operations.
Data Source
AI summary
Comparator input noise or offset suppression can include an error detector circuit that can operate in a feedback loop, such as during an autozero phase. The error detector circuit can include a time-varying filter response to improve accuracy and convergence time. The comparator can be used in a successive approximation routine (SAR) or other analog-to-digital converter (ADC) circuit, such as to control a digital-to-analog converter (DAC), such as can be used to adjust a tuning circuit within the comparator to compensate for noise or offset. The DAC can be combined with a DAC used for carrying out SAR bit-trials or bit decisions.