Comparator Bias Switching for Fast Low-Power AD Conversion
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Solution Overview
Problem
The comparator in CMOS image sensors takes a considerable amount of time to become operative when the current source is changed from OFF to ON, hindering high-speed AD conversion, while achieving high-speed conversion with a large current source increases power consumption.
Innovation Solution
The bias current flowing through the comparator is adjusted from a first current to a second current during sections of the reference signal where the reference signal changes, and a capacitor is connected to the comparator output during these sections to enhance response speed while minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the current source in the comparator is turned off to reduce power consumption, then power consumption is reduced, but the response time increases and high-speed AD conversion becomes difficult
Solution Approach 1:
The patent applies dynamics by making the bias current adjustable rather than fixed. The bias current is dynamically changed between a first bias current (lower) and a second bias current (higher) depending on the operating phase. During the integration phase, the lower bias current reduces power consumption, while during the conversion phase, the higher bias current improves response speed. This dynamic adjustment resolves the contradiction between power consumption and response time.
Solution Approach 2:
The patent implements periodic action by alternating between different bias current levels according to the AD conversion phase. The bias current is periodically switched between the first bias current during the integration phase and the second bias current during the conversion phase. This periodic modulation allows the system to optimize power consumption during non-critical phases while ensuring high-speed performance during critical conversion phases.
2Speed
If a large current flows into the current source to achieve high-speed AD conversion, then response time is reduced, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the bias current adjustable rather than fixed. The bias current is dynamically changed between a first bias current (lower) and a second bias current (higher) depending on the operating phase. During the integration phase, the lower bias current reduces power consumption, while during the conversion phase, the higher bias current improves response speed. This dynamic adjustment resolves the contradiction between power consumption and response time.
Solution Approach 2:
The patent applies partial action by providing high current (second bias current) only during the specific conversion phase when high speed is needed, rather than maintaining high current continuously. During the integration phase, a lower current (first bias current) is sufficient. This partial application of high current achieves high-speed conversion when necessary while avoiding unnecessary power consumption during other phases.
Data Source
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AI summary
The present technology relates to an AD conversion device, an AD conversion method, an image sensor, and an electronic apparatus that are able to achieve high-speed, low-power-consumption AD conversion. In a case where an electrical signal and a variable-level reference signal are compared by a comparator and the result of comparison is used to perform AD (Analog to Digital) conversion of the electrical signal, control is exercised in such a manner that a bias current flowing in the comparator to operate the comparator during a certain section of the reference signal including a section where the reference signal changes is increased from a first current, which is larger than 0 (zero), to a second current, which is larger than the first current. The present technology is applicable, for example, to AD conversion of an electrical signal.