Comparator Circuit Biasing for Low-Power ADC Conversion
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Solution Overview
Problem
Current analog-to-digital converter (ADC) circuits in image sensors for mobile devices consume high power, limiting the efficiency of large scale integration (LSI) image sensors, and existing differential amplifier circuits do not effectively manage power consumption.
Innovation Solution
A comparator circuit with a differential amplifier and output amplifier configuration, including a differential input circuit, load circuit, current sources, and bias voltage supplying circuits, which sets operating points for transistors using switches and capacitors to reduce power consumption by optimizing the comparison and amplification processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional ADC circuits are used in image sensors, then the image sensor can perform analog-to-digital conversion, but the power consumption is high
Solution Approach 1:
The ADC circuit is divided into multiple stages: a differential amplifier stage for signal comparison and an output amplifier stage for signal amplification. This segmentation allows each stage to be optimized independently, with the differential amplifier operating at low power by only performing comparison without requiring full rail-to-rail output swing, thereby reducing overall power consumption while maintaining conversion functionality
Solution Approach 2:
The circuit employs dynamic element sizing where the transistor widths in the differential amplifier are optimized to provide sufficient gain for comparison while consuming minimal current. The output amplifier dynamically amplifies the differential signal to full swing, allowing the low-power differential stage to drive the output stage efficiently, thus achieving low power consumption without sacrificing conversion reliability
2Stability of the object's composition
If a differential amplifier circuit is used to suppress output operating point changes, then the output stability is improved, but the power consumption increases
Solution Approach 1:
The amplifier is segmented into a differential input stage and a separate output stage. The differential stage provides common-mode rejection and output stability through its inherent differential configuration, while the output stage handles the full swing amplification. This segmentation allows the differential stage to operate at low current for stability without bearing the full power burden
Solution Approach 2:
The differential amplifier performs only partial amplification sufficient for comparison purposes rather than full output drive. The output stage then completes the amplification to full rail-to-rail swing. This partial action in the differential stage reduces its power consumption while the output stage provides the necessary drive capability, achieving stability without excessive power consumption
Data Source
AI summary
A comparator circuit includes a differential input circuit, a load circuit, a first current source, a first bias voltage supplying circuit, a third connection circuit, and a fourth connection circuit. The differential input circuit includes a first transistor to which a first input signal is supplied and a second transistor to which a second input signal is supplied. The load circuit includes a third transistor connected to the first transistor through a first connection circuit and a fourth transistor connected to the second transistor through a second connection circuit, gates of the third and fourth transistors being connected to the first connection circuit through a third capacitor. The first bias voltage supplying circuit supplies a first bias voltage to the gates of the third and fourth transistors and the third capacitor.