Comparator Bit Determination for ISI-Affected Signal Decoding
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Solution Overview
Problem
Existing semiconductor integrated circuits face challenges in accurately processing analog signals that have undergone inter-symbol interference due to transmission path losses, leading to difficulties in decoding data effectively.
Innovation Solution
The semiconductor integrated circuit employs a configuration that includes a comparator for differential signal comparison, a control circuit to determine bit values, and a determination processing circuit to handle metastable states, setting temporary values for bits with unresolved determinations, ensuring accurate digital signal generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the reception device processes analog signals that have undergone inter-symbol interference, then data decoding accuracy deteriorates, but implementing complex interference compensation increases device complexity
Solution Approach 1:
The patent applies preliminary action by setting temporary values for undetermined bits in advance before the comparison operation completes. The control circuit predicts bit values based on initial comparison results and sets temporary values proactively, rather than waiting for the full comparison to finish. This preliminary setting of temporary values prevents decoding errors caused by inter-symbol interference without requiring complex real-time compensation mechanisms.
Solution Approach 2:
The patent implements feedback by having the control circuit monitor the comparison operation status and adjust bit values based on feedback from the comparison results. When the comparison operation is still ongoing or yields ambiguous results, the control circuit uses feedback from intermediate comparison states to determine final bit values, ensuring accurate decoding even when signals have undergone inter-symbol interference.
2Measurement precision
If the comparison operation time is extended to resolve metastable states, then measurement precision improves, but processing speed decreases
Solution Approach 1:
The patent applies preliminary action by setting temporary values for bits before the comparison operation fully completes. Instead of waiting for the comparison to finish to determine bit values, the control circuit proactively sets temporary values based on initial comparison states, allowing the system to proceed with processing while the comparison continues in the background. This eliminates the need to extend comparison time for metastable state resolution.
Solution Approach 2:
The patent implements dynamics by making the bit value determination process adaptive and flexible. The control circuit dynamically adjusts bit values based on the ongoing comparison operation status, allowing transitions from temporary values to final determined values as the comparison progresses. This dynamic approach enables the system to handle metastable states without fixed, extended comparison times, maintaining high processing speed while ensuring accuracy.
Data Source
AI summary
According to one embodiment, a semiconductor integrated circuit includes: a comparator configured to execute comparison processing of differential analog signals; and a control circuit configured to determine values of a plurality of bits based on a result of the comparison processing of the comparator and generate a digital signal including the determined values of the plurality of bits, wherein the control circuit is configured to set an initial value for a first bit of a determination target among the plurality of bits, and if the determination of the first bit is not ended in a first period, set a first temporary value having a first value for the first bit.