Continuous-Time Comparator with Boost Current for Low Jitter

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Solution Overview

Problem

Continuous-time comparators face a trade-off between propagation delay and transistor noise, with increased bias current reducing delay but increasing power consumption, and reduced bias current increasing noise.

Innovation Solution

A comparator system with an always-on current source for bias current and a boost current source that conducts only during an enable period, allowing for reduced power consumption while maintaining low noise and fast propagation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If bias current is increased, then propagation delay is reduced, but power consumption increases

Engineering Contradiction:
Improvepropagation delayVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The comparator uses a dynamic current architecture where the bias current is adjusted based on operational needs. An auxiliary comparator detects when the ramp signal exceeds a duty cycle voltage and asserts an enable signal, which activates a boost current source to provide additional current to the main comparator. This dynamic current adjustment allows the system to achieve fast propagation delay when needed while consuming less power during idle periods.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs periodic ramp signals to trigger comparator operation. The boost current source conducts current only during specific periods when the enable signal is asserted, rather than continuously. This periodic activation aligns current consumption with actual computational needs, reducing overall power usage while maintaining fast response when the ramp signal requires comparison.

Inventive Principle:
Principle #19Periodic action

2Use of energy by moving object

If bias current is reduced, then power consumption is reduced, but transistor noise increases

Engineering Contradiction:
Improvepower consumptionVSAvoidtransistor noise
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The dynamic current architecture allows the system to maintain low average power consumption while providing high current when needed to suppress noise. The boost current source activates only when the enable signal is asserted, providing sufficient current to keep transistor noise low during critical comparison operations, while remaining inactive during idle periods to minimize power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The auxiliary comparator performs preliminary detection by comparing the ramp signal against the duty cycle voltage before the main comparator operates. This preliminary action triggers the enable signal in advance, allowing the boost current source to activate before the main comparison occurs, ensuring that sufficient current is available to minimize transistor noise during the critical comparison window.

Inventive Principle:
Principle #10Preliminary action

3Speed

If bias current is increased, then propagation delay is reduced, but noise increases

Engineering Contradiction:
Improvepropagation delayVSAvoidtransistor noise
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The system dynamically adjusts current levels to optimize both speed and noise performance. During active comparison periods, the boost current source provides high current to minimize propagation delay and transistor noise. During idle periods, the current is reduced to minimize power consumption. This dynamic adjustment ensures that high current is applied only when needed for fast, low-noise operation.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250240003A1Low power and low noise continuous-time comparator
Publication Date: 2025.07.24 QUALCOMM INC
  • US20250240003A1 patent drawing
  • US20250240003A1 patent drawing
  • US20250240003A1 patent drawing

AI summary

A comparator is provided with an always-on current source that conducts a bias current through the comparator. The comparator asserts a comparator output signal in response to a ramp signal being greater than a threshold voltage. To increase the comparator speed while maintaining a relatively low power consumption, the comparator includes a boost current source that conducts a boost current through the comparator only during an enable period that begins when the ramp signal is greater than a duty cycle voltage that is less than the threshold voltage.