Error cancelling comparator based switch capacitor circuit and method thereof

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Solution Overview

Problem

Comparator based switch capacitor circuits suffer from errors due to circuit delay and comparator offset, leading to inaccuracies in sampled values.

Innovation Solution

The circuit operates in multiple phases, sampling an input voltage and error during the sampling phase, and amplifies the voltage while canceling errors by reversing the polarity connection of an internal capacitor during the transfer phase.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a comparator based switch capacitor circuit is used to achieve fast charge transfer and high speed operation, then productivity is improved, but measurement precision deteriorates due to circuit delay and comparator offset errors

Engineering Contradiction:
Improvecharge transfer speedVSAvoidsampled value accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by performing error sampling in advance during the sampling phase. The circuit samples the error caused by circuit delay and comparator offset before the main charge transfer operation, stores this error sample, and then uses it to compensate for the error in the final measurement. This allows the circuit to operate at high speed while maintaining precision through pre-captured error data.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent converts the harmful effect of circuit delay and comparator offset into a beneficial compensation mechanism. By intentionally sampling the error introduced by these non-idealities and then using reverse polarity connection to subtract this sampled error from the main measurement, the circuit transforms what would be unavoidable inaccuracies into a correctable phenomenon, achieving high precision despite fast operation speeds.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Measurement precision

If the sampling phase duration is extended to improve measurement precision, then measurement precision is improved, but productivity deteriorates due to reduced charge transfer phase time

Engineering Contradiction:
Improveerror sampling accuracyVSAvoidoperating cycle throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies partial action by sampling only the error component during the sampling phase rather than performing the complete measurement function. The sampling capacitor briefly captures only the error signal (caused by circuit delay and comparator offset) and then quickly transfers this error sample to the holding capacitor. This partial sampling approach maintains measurement precision while keeping the sampling phase duration short, allowing the charge transfer phase to complete quickly and maintain high operating throughput.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS7450041B2Error cancelling comparator based switch capacitor circuit and method thereof
Publication Date: 2008.11.11 REALTEK SEMICON CORP
  • US7450041B2 patent drawing
  • US7450041B2 patent drawing
  • US7450041B2 patent drawing

AI summary

An error canceling comparator based switch capacitor (CBSC) circuit cyclically works through multiple phases including a sampling phase and a transfer phase. During the sampling phase, an input voltage and also an error due to circuit non-idealities are sampled. During the transfer phase, the sampled input voltage is amplified by a fixed ratio and transferred to an output load, while the error is cancelled by reversing the polarity of connection for an internal capacitor within the CBSC circuit.