Comparator Circuit Offset Calibration for Power Supply Control
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Solution Overview
Problem
Conventional comparator circuits experience deteriorated output accuracy due to significant differences in input offsets among comparators, leading to inconsistent logic switching timing for the same input signal, even when using comparators with different circuit characteristics.
Innovation Solution
A comparator circuit design that includes a first comparator for fast response and a second comparator for low power consumption, with a variable reference voltage generator and logic unit to automatically adjust offsets, allowing selective use of comparators based on load conditions, ensuring accurate output by synchronizing the response behaviors of both comparators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple comparators with different circuit characteristics are used, then response speed and power consumption can be optimized for different conditions, but output accuracy deteriorates due to different input offsets
Solution Approach 1:
The patent changes the reference voltage parameter dynamically. A variable reference voltage is applied to the second comparator during a calibration period to adjust its input offset, then switched to a fixed reference voltage during normal operation. This parameter change enables the system to compensate for offset differences while maintaining the ability to selectively use different comparators based on response speed and power consumption requirements.
2Use of energy by moving object
If comparators with different input offsets are used, then power consumption and response speed can be optimized, but logic switching timing becomes inconsistent
Solution Approach 1:
The patent performs preliminary calibration action during a calibration period before normal operation. The variable reference voltage is applied to pre-adjust the input offset of the second comparator, ensuring that logic switching timing will be consistent when the comparator is later used in normal operation. This preliminary action resolves the timing inconsistency issue while allowing power consumption optimization.
3Device complexity
If a single comparator is used, then circuit structure is simple, but cannot optimize for both fast response and low power consumption simultaneously
Solution Approach 1:
The patent introduces dynamic switching between two comparators based on operational conditions. The logic unit dynamically selects which comparator to use - the first comparator for fast response requirements and the second comparator for low power consumption requirements. This dynamic approach enables optimization for different conditions while maintaining relatively simple circuit structure through the use of a multiplexer for switching.
Data Source
AI summary
A comparator circuit includes a first comparator arranged to compare an input signal with a reference voltage so as to generate a first comparison signal, a second comparator arranged to compare the input signal with a variable reference voltage so as to generate a second comparison signal, a variable reference voltage generator arranged to generate the variable reference voltage, and a logic unit arranged to output one of the first comparison signal and the second comparison signal as a comparison signal. The logic unit outputs the first comparison signal as the comparison signal while controlling the variable reference voltage generator to sweep the variable reference voltage until the first comparison signal and the second comparison signal exhibit desired response behaviors, and moves to a state capable of outputting the second comparison signal as the comparison signal after the sweep of the variable reference voltage is completed.