Comparator Current Booster Circuit for Faster Output Settling

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Continuous-time comparators experience undesirably long settling times for output voltage signals, which can reduce the efficiency of analog-to-digital conversion processes.

Innovation Solution

Employing a current booster circuit that amplifies the current flowing through the comparator to reduce the settling time of the output voltage signal, utilizing current mirror circuits and transistors to increase the current value over a predetermined duration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a continuous-time comparator is used to continuously monitor the input voltage signal, then the comparator can decide at the moment the input voltage signal crosses the reference level, but the output voltage signal experiences undesirably long settling time

Engineering Contradiction:
Improveresponse speedVSAvoidsettling time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-charging the output node capacitance through a current booster circuit before the comparison decision is made. The current booster circuit activates early in the comparison process to charge the output node, ensuring that when the comparison result is determined, the output voltage signal is already close to its final value, thereby reducing settling time without sacrificing response speed

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs periodic action through a clock signal that periodically activates the current booster circuit. The current booster is enabled during specific phases of the clock cycle to provide charging current, and disabled during other phases to allow normal operation. This periodic control optimizes the balance between reducing settling time and maintaining continuous monitoring capability

Inventive Principle:
Principle #19Periodic action

2Loss of time

If the current flowing through the comparator is increased to reduce settling time, then the output voltage signal stabilizes faster, but the power consumption increases

Engineering Contradiction:
Improvesettling timeVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the current booster circuit controllable and dynamic rather than static. The current booster is enabled only during specific periods when settling is needed, controlled by a clock signal or control logic. This dynamic control allows the system to increase current temporarily to reduce settling time, then return to normal lower current operation, optimizing the trade-off between settling speed and power consumption

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the current parameter dynamically by adjusting the current flow through the comparator based on operational needs. The current booster circuit modifies the current parameter from a baseline value to a higher value during settling phases, and returns it to the baseline value during normal operation. This parameter change approach allows the system to achieve fast settling when needed while maintaining low power consumption during normal operation

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The settling time of the output voltage signal is reduced by up to 75%, enhancing the efficiency of the comparator's output stabilization and accuracy.

Implementation Method 1

The current generator circuit includes a current mirror circuit that generates the current

Methodology Applied
Scientific EffectCurrent mirror:

Implementation Method 2

A current booster circuit amplifies the current from an initial current value to a higher current value and maintains the current at the higher current value over a predetermined duration of time

Methodology Applied
Scientific EffectTransistor current amplification:

Data Source

PatentUS20260025126A1Device and Method for Reducing a Settling Time of an Output of the Same
Publication Date: 2026.01.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260025126A1 patent drawing
  • US20260025126A1 patent drawing
  • US20260025126A1 patent drawing

AI summary

A device includes a comparator circuit and a current generator circuit. The comparator circuit, responsive to a current, receives an input signal and a reference signal, compares the input signal with the reference signal, and generates an output signal that indicates the result of comparison. The current generator circuit includes a current mirror circuit and a current booster circuit. The current mirror circuit generates the current. The current booster circuit amplifies the current from an initial current value to a higher current value and maintains the current at the higher current value over a predetermined duration of time. A method for reducing a settling time of an output of the device is also disclosed.