Comparator Current Staging for Faster SAR-ADC Decision Time
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Solution Overview
Problem
High-speed comparators are necessary for successive approximation register analog-to-digital converters (SAR-ADCs) to effectively compare voltage levels, but existing solutions do not efficiently manage current flow, leading to suboptimal operating speeds.
Innovation Solution
A comparing device with a comparing circuit, a first current generating circuit, and a second current generating circuit, where the second current generating circuit provides a constant current to a common node even when the comparing circuit is disabled, pre-charging the node and reducing decision time when re-enabled, thereby enhancing operating speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the comparing circuit is disabled and current generation is stopped to save power, then power consumption is reduced, but the decision time increases when the circuit is re-enabled
Solution Approach 1:
The first current generating circuit is pre-enabled before the comparing circuit to pre-charge the common node to a predetermined voltage level. This preliminary action ensures that when the comparing circuit is subsequently enabled, the common node is already at the required voltage, eliminating the delay that would otherwise occur while the node charges up. This resolves the contradiction by preparing the system in advance, allowing fast response when needed while maintaining power efficiency through selective enabling.
Solution Approach 2:
The patent implements dynamic control of current generating circuits with different enablement timings. The first current generating circuit is enabled earlier than the comparing circuit, creating a staged activation sequence. This dynamic timing control allows the system to adapt between power-saving mode (where circuits are disabled) and high-speed mode (where circuits are pre-enabled), resolving the contradiction between power consumption and decision time through temporal dynamics.
2Speed
If the common node is not pre-charged to a predetermined voltage level, then power consumption is minimized, but the operating speed of the comparator decreases
Solution Approach 1:
The first current generating circuit performs preliminary charging of the common node to a predetermined voltage level before the comparing operation begins. This pre-charging action prepares the common node in advance, ensuring that when the comparing circuit is enabled, the node is already at the optimal voltage for immediate high-speed comparison, thus achieving fast operating speed without requiring continuous power consumption.
Solution Approach 2:
The patent implements periodic or pulsed current generation where the first current generating circuit is enabled only during specific periods (before and during comparison operations) rather than continuously. This periodic activation provides the necessary voltage levels for high-speed operation only when needed, while remaining inactive during other periods to minimize power consumption, thereby resolving the contradiction between speed and power usage.
Data Source
AI summary
A comparing device includes a first current generating circuit arranged to selectively generate a first current and a second current different from the first current, according to a first control signal. The comparing device also includes a comparing circuit having a common node coupled to the first current generating circuit for comparing a first input signal and a second input signal to generate an output signal according to the first current, the second current, and a second control signal. The second control signal and the first control signal are in-phase with each other.