Delta-Sigma Modulator Feedback Using Comparator Delay Compensation
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Solution Overview
Problem
Continuous-time delta-sigma modulators face instability due to excess loop delay caused by propagation delay through the comparator, which degrades the performance of the feedback loop.
Innovation Solution
Incorporating compensation capacitors and additional current DACs to create a third feedback loop that compensates for the comparator delay, stabilizing the system by ensuring the feedback signal is based on current comparator output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a comparator is used in the delta-sigma modulator feedback loop, then the modulator can perform signal encoding and feedback operations, but propagation delay through the comparator introduces loop delay that degrades performance and causes instability
Solution Approach 1:
The patent applies preliminary action by predicting the current comparator output based on previous outputs and using this prediction to generate the feedback signal before the actual comparator output is available. This anticipatory approach compensates for the propagation delay, allowing the feedback loop to operate as if it were using current values rather than delayed values, thereby maintaining stability without requiring faster comparators.
2Reliability
If the feedback signal is based on delayed comparator output, then the system structure remains simple, but the feedback loop performance degrades and instability occurs
Solution Approach 1:
The patent introduces an intermediary prediction mechanism that generates predicted comparator outputs based on historical data. This intermediary element bridges the gap between the delayed actual comparator output and the feedback requirement, allowing the system to use predicted values that closely approximate current values. The prediction mechanism acts as a mediator that compensates for delay without requiring fundamental changes to the feedback loop structure.
3Productivity
If comparator delay is present, then the existing feedback loop structure can be maintained, but performance degradation and instability result
Solution Approach 1:
By predicting the comparator output in advance based on previous outputs and using this prediction to generate the feedback signal, the system effectively eliminates the impact of propagation delay on signal encoding accuracy. The prediction is performed preliminarily, before the actual comparison is complete, ensuring that the feedback signal reflects current rather than delayed comparator output, thereby maintaining high encoding accuracy despite the presence of delay.
Data Source
AI summary
A delta-sigma modulator includes a first integrator and a comparator. The comparator's positive input couples to the first integrator's positive output, and the comparator's negative input couples to the first integrator's negative output. A first current DAC comprises a current source device, and first and second transistors. The first transistor has a first transistor control input and first and second current terminals. The first current terminal couples to the current source device, and the second current terminal couples to the first integrator positive output. The second transistor has a second transistor control input and third and fourth current terminals. The third current terminal couples to the current source device, and the fourth current terminal couples to the first integrator negative output. A first capacitive device couples to the second transistor control input and to both the second current terminal and the first integrator positive output.