Comparator Circuit Dynamic Current Adjustment for Speed and Power

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional comparators face a mutual restriction between response speed and power consumption, with complex circuit structures and high precision requirements, limiting further improvement in comparison speed and precision.

Innovation Solution

A comparator design incorporating a first and second mirror unit, an input unit, a feedback unit, and an output unit, which dynamically adjusts the dynamic current based on feedback current, allowing for high-speed response without compromising precision by dynamically adjusting characteristics based on operation status.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a large quantity of adjustable capacitors are used in the offset calibration circuit to improve comparison precision, then the precision is improved, but the circuit structure becomes excessively complex

Engineering Contradiction:
Improvecomparison precisionVSAvoidcircuit structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the offset calibration function from the traditional complex capacitor array structure and implements it using a simplified current mirror circuit with a single adjustable capacitor. The offset calibration unit uses a current mirror to generate calibration currents that are added to the differential input, eliminating the need for multiple parallel capacitor branches and their associated switches, thereby significantly reducing circuit complexity while maintaining precision adjustment capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the calibration mechanism from voltage-based (using capacitor arrays) to current-based (using current mirrors). By adjusting the tail current of the current mirror circuit, the offset calibration is achieved through current modulation rather than capacitor switching, simplifying the circuit structure while preserving the ability to precisely adjust comparison precision

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If a capacitor array with high matching degree is used to improve precision, then the precision is improved, but the technological requirement becomes excessively high

Engineering Contradiction:
Improvecomparison precisionVSAvoidcapacitor matching requirement
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The patent removes the capacitor array from the calibration circuit and replaces it with a current mirror-based offset calibration unit. This extraction eliminates the need for high-precision capacitor matching, as the calibration is achieved through current mirror ratio adjustment and tail current control, which have relaxed manufacturing requirements compared to precise capacitor matching

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses current mirror copying to generate precise calibration currents. Instead of relying on precise physical capacitor matching, the current mirror circuit copies and scales reference currents to create the necessary calibration signals, achieving high precision through circuit topology rather than component matching

Inventive Principle:
Principle #26Copying

3Use of energy by moving object

If conventional comparator architecture is used to maintain low power consumption, then power consumption is low, but the response speed is limited

Engineering Contradiction:
Improvepower consumptionVSAvoidresponse speed
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The patent introduces dynamic tail current control in the differential input stage. The tail current is dynamically adjusted based on the differential input voltage magnitude - increasing for large voltage differences to accelerate response, and decreasing for small differences to save power. This dynamic adaptation resolves the contradiction between speed and power consumption by optimizing current based on actual operating conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements periodic switching between different operational modes using clock signals. The differential stage is periodically enabled and disabled, and the tail current is periodically adjusted between high and low levels. This periodic action allows the circuit to achieve high response speed when needed while maintaining low average power consumption during idle or low-activity periods

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10574221B2Comparator, integrated circuit, and method
Publication Date: 2020.02.25 SEMICON MFG INT (BEIJING) CORP
  • US10574221B2 patent drawing
  • US10574221B2 patent drawing
  • US10574221B2 patent drawing

AI summary

The present disclosure provides a comparator, an integrated circuit, and a method. One form of the comparator includes: a first mirror unit, configured to output a dynamic current to an input unit and adjust a value of the dynamic current based on a received feedback current; a second mirror unit, configured to output a fixed current to the input unit; the input unit, configured to output a first current to a feedback unit and a second current to an output unit based on a difference between a first voltage and a second voltage, the fixed current, and the dynamic current; the feedback unit, configured to output a feedback current to the first mirror unit after receiving the first current; and the output unit, configured to: obtain the second current or a mirror current of the adjusted dynamic current, output a first comparison result in response to the second current when the first voltage is greater than the second voltage, and output a second comparison result in response to the mirror current when the first voltage is less than the second voltage. The comparator can improve a comparison speed.