Two-Stage Comparator Circuit for Low-Power Fast Regeneration

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional comparators in DRAMs face challenges with high power consumption and voltage requirements that do not meet current mobile device demands.

Innovation Solution

A two-stage circuit design comprising a first stage for differential amplification and a second stage for latching, utilizing cross-coupled transistors to reduce noise and temperature influence, and a reduced number of transistors per current path to enhance transconductance and minimize power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional comparator design is used, then comparison function is achieved, but power consumption is high and working voltage is high

Engineering Contradiction:
Improvepower consumptionVSAvoidcomparison performance
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The comparator is divided into two distinct stages: a first stage circuit for differential amplification and a second stage circuit for latching and regeneration. This segmentation allows each stage to be optimized independently - the first stage uses minimal transistors for low-power amplification while the second stage provides robust latching, resolving the contradiction between low power consumption and reliable comparison performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes key design parameters including reducing the number of transistors per current path to enhance transconductance, optimizing the cross-coupled transistor configuration to reduce noise and temperature influence, and adjusting the latching mechanism parameters. These parameter changes enable the comparator to achieve reliable performance at lower power consumption levels than conventional designs.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If more transistors are used per current path, then noise and temperature influence are reduced, but power consumption increases

Engineering Contradiction:
Improvenoise immunityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

Cross-coupled transistors are strategically placed in specific locations within the circuit - in the first stage for differential amplification and in the second stage for latching. This local application of cross-coupling provides noise immunity and temperature compensation exactly where needed, rather than uniformly across the entire circuit, thereby achieving reliability without excessive power consumption.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The cross-coupled transistor configuration creates positive feedback loops that naturally compensate for noise and temperature variations. The feedback mechanism allows the circuit to self-correct disturbances without requiring additional active components, maintaining noise immunity while keeping power consumption low.

Inventive Principle:
Principle #23Feedback

3Stability of the object's composition

If conventional latching mechanism is used, then output stability is achieved, but regeneration delay is high

Engineering Contradiction:
Improveoutput stabilityVSAvoidregeneration delay
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The first stage circuit performs preliminary differential amplification of the input signals before they reach the latching stage. By pre-amplifying the signal difference in the first stage, the second stage latching mechanism receives a stronger, more differentiated input, which reduces the time required for regeneration while maintaining output stability. This preliminary action resolves the contradiction between fast regeneration and stable output.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP4195508B1comparator
Publication Date: 2025.12.24 CHANGXIN MEMORY TECH INC
  • EP4195508B1 patent drawingFigure 1
  • EP4195508B1 patent drawingFigure 2
  • EP4195508B1 patent drawingFigure 3

AI summary

Embodiments of the present application relate a comparator, including: a first stage circuit, configured to receive a voltage signal to be compared and a reference voltage signal Vref, and to generate and output a first amplifying signal and a second amplifying signal based on the voltage signal to be compared and the reference voltage signal Vref; a second stage circuit, connected with the first stage circuit, configured to generate and latch a first output signal and a second output signal based on the first amplifying signal and the second amplifying signal; wherein the first stage circuit and/or the second stage circuit include(s) a first pair of cross-coupled transistors.