Column Comparator Latch Circuit for Accurate Image Sensor A/D Conversion
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Solution Overview
Problem
Conventional imaging devices using time-to-digital converter (TDC) and single slope (SS) type AD conversion circuits face inefficiencies in power consumption and accuracy due to complex circuit operations and susceptibility to signal bounces during analog-to-digital conversion processes.
Innovation Solution
The proposed imaging device incorporates a comparator with a differential amplifier and capacitive elements to generate comparison signals, a latch section to latch phase signals, and a latch controller to manage the latching operation based on comparison results, simplifying the circuit and reducing power consumption while enhancing conversion accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a TDC type AD conversion circuit and an SS type AD conversion circuit are combined, then AD conversion accuracy is improved, but power consumption increases and circuit complexity increases
Solution Approach 1:
The patent extracts and eliminates unnecessary circuit operations from the AD conversion process. Specifically, it removes redundant comparison operations and simplifies the latch control mechanism, keeping only the essential functions needed for accurate conversion while reducing power consumption.
Solution Approach 2:
The patent applies partial action by performing comparisons only when necessary rather than continuously. The latch controller activates latching operations selectively based on comparison results, avoiding excessive circuit operations that would increase power consumption while maintaining conversion accuracy.
2Measurement precision
If a TDC type AD conversion circuit and an SS type AD conversion circuit are combined, then AD conversion accuracy is improved, but device complexity increases
Solution Approach 1:
The patent merges the TDC and SS type AD conversion circuits into a unified structure where they work together efficiently. The comparator outputs are integrated with the latch section, and the latch controller coordinates both conversion types through a single control mechanism, reducing overall circuit complexity.
Solution Approach 2:
The latch section is designed with multi-functionality to handle both TDC and SS type conversion results through a universal latching mechanism. The latch controller provides a unified control interface that manages different conversion types without requiring separate complex control circuits for each.
3Measurement precision
If complex circuit operations are performed, then AD conversion accuracy is improved, but signal bounce susceptibility increases
Solution Approach 1:
The patent applies preliminary action by pre-configuring the latch section to be ready for latching operations before comparison results are finalized. The latch controller prepares the latching mechanism in advance, allowing it to quickly capture stable comparison results and avoid signal bounce issues during the conversion process.
Solution Approach 2:
The patent uses skipping by rapidly transitioning through the comparison and latching process once the comparison result is valid. The latch controller quickly activates the latching operation to capture the comparison result before signal bounce can occur, rushing through the critical transition period to maintain accuracy.
Data Source
AI summary
An imaging device includes: an imaging section in which a plurality of pixels each having a photoelectric conversion element are arranged in a matrix shape; a clock generator that generates a plurality of phase signals having different phases; a reference signal generator that generates a reference signal which increases or decreases with a lapse of time; a comparator that is disposed to correspond to each column of an array of the plurality of pixels, performs a comparing process of comparing a pixel signal output from each pixel with the reference signal, and outputs a first comparison result signal and a second comparison result signal indicating a result of the comparing process; a latch section that is disposed to correspond to the comparator and latches logic states of the plurality of phase signals; and a latch controller.