Comparator Logic for Forbidden Flip-Flop Input Prevention
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Solution Overview
Problem
Conventional comparator circuits may output forbidden input combinations to subsequent flip-flops when differential signals have no potential difference, leading to undesirable operations.
Innovation Solution
A comparator circuit that includes a converter circuit for differential amplification and converting signals to complementary digital signals, and a logic circuit performing logical operations to ensure that digital signals output to a flip-flop never include a forbidden input combination, even when the differential signals have no potential difference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional comparator circuits are used for rapid A/D conversion, then conversion speed is improved, but forbidden input combinations may be output to flip-flops when differential signals have no potential difference
Solution Approach 1:
A logic circuit is introduced as an intermediary component between the differential amplifier and the flip-flop. This logic circuit receives the differential output signals and processes them to ensure that forbidden input combinations are never presented to the flip-flop, thereby maintaining both high conversion speed and output reliability.
Solution Approach 2:
The logic circuit performs preliminary processing of the differential signals before they reach the flip-flop. By anticipating and preventing the generation of forbidden input combinations in advance, the system ensures reliable flip-flop operation without compromising the rapid conversion speed required for high-performance A/D converters.
2Measurement precision
If differential amplification is used to convert differential signals to digital signals, then conversion accuracy is improved, but forbidden input combinations (11 or 00) may be output when input signals have no potential difference
Solution Approach 1:
The logic circuit is designed to convert the potentially harmful situation of intermediate potential outputs into a beneficial outcome. When the differential amplifier outputs intermediate potentials that could lead to forbidden combinations, the logic circuit transforms these into valid input combinations (01 or 10) that the flip-flop can process reliably, thereby eliminating the harmful effect while preserving the accurate signal comparison capability.
3Device complexity
If logic gates are used without edge detectors, then circuit complexity is reduced, but threshold voltage fluctuations cause unreliable digital output
Solution Approach 1:
The logic circuit is designed to be self-regulating with respect to threshold voltage fluctuations. By using logic operations that are inherently robust to threshold variations (such as AND, OR, and XOR operations on complementary signals), the circuit automatically compensates for threshold voltage changes without requiring additional edge detector components, thereby maintaining both simplicity and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively prevents the output of forbidden input combinations to subsequent flip-flops, ensuring reliable operation even when differential signals have no potential difference.
Implementation Method 1
a converter circuit performing differential amplification for the differential signals and converting the resultant signals to first and second signals that are complementary digital signals
Data Source
AI summary
A comparator circuit outputs first and second digital signals corresponding to differential signals to a flip-flop having a predetermined forbidden input combination. A converter circuit performs differential amplification for the differential signals and converts the resultant signals to first and second signals that are complementary digital signals. A logic circuit performs predetermined logical operation, and when the logical values of the first and second signals are different from each other, outputs the first and second digital signals corresponding to the logical values of the first and second signals, and when the logical values of the first and second signals are the same, outputs the first and second digital signals having a same value other than the predetermined forbidden input combination.