Sigma-Delta Comparator Delay Compensation for Loop Stability
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Solution Overview
Problem
Continuous-time delta-sigma modulators face instability due to propagation delays in the comparator, which degrades the performance of the feedback loop and can cause the modulator to become unstable.
Innovation Solution
The design of a comparator with specific transistor configurations and additional current DACs to compensate for the delay, including a pre-amplifier and three feedback loops, addresses the instability issue by ensuring the feedback signal is based on current comparator output rather than delayed output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a comparator is used in a continuous-time delta-sigma modulator, then the modulator can perform analog-to-digital conversion, but propagation delay through the comparator causes feedback signal delay that degrades performance and causes instability
Solution Approach 1:
The patent applies preliminary action by predicting what the comparator output should be based on previous outputs and feedforward signals, then using this prediction to compensate for the delay before the actual delayed signal arrives. The delay compensation circuit generates a predicted comparator output signal in advance to replace the delayed signal in the feedback path.
Solution Approach 2:
The patent uses feedback by taking the actual delayed comparator output signal and using it to adjust and refine the predicted comparator output signal. The feedback loop compares the predicted signal with the actual delayed signal and uses the difference to improve the accuracy of the compensation, ensuring the feedback signal accurately represents the current state rather than a delayed state.
2Reliability
If delay compensation circuits are added to compensate for comparator propagation delay, then modulator stability improves, but device complexity increases due to additional components
Solution Approach 1:
The patent merges the delay compensation functionality with the existing comparator structure by integrating the delay compensation circuit closely with the comparator outputs. The compensation circuit uses the same feedforward and feedback signals that are already present in the delta-sigma modulator architecture, combining multiple functions into a unified structure rather than adding completely separate compensation systems.
Data Source
AI summary
A circuit includes a transconductance stage having first and second outputs. The circuit also includes a comparator having first and second inputs. The first input is coupled to the first output, and the second input is coupled to the second output. The comparator includes first through fifth transistors and a pair of cross-coupled transistors. The pair of cross-coupled transistors is coupled to the second current terminals of the first and second transistors. The second current terminal of the third transistor is coupled to the second current terminal of the first transistor, and the first current terminals of the first, second, and third transistors are coupled together. The second current terminals of the fourth and fifth transistors are coupled together and to the control input of the third transistor.