Comparator Circuit Clock Gating After Match Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing comparator circuit in liquid crystal display devices continues to consume high power even after outputting a matching pulse, leading to unnecessary switching operations.

Innovation Solution

A comparator circuit with a flip-flop circuit that generates an enable signal to stop the comparator element's operation after a matching signal is asserted, preventing further comparison and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the comparator continues to perform comparison operations after the counter output matches the digital image data, then the switching operation continues, but the power consumption in the comparator becomes large

Engineering Contradiction:
Improvecomparison operation completionVSAvoidpower consumption in comparator
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by generating the enable signal in advance through a flip-flop circuit that is triggered when the matching signal is asserted. This enable signal is prepared beforehand to immediately stop the comparator element's operation after the matching pulse is output, preventing continuous switching operations and reducing power consumption while ensuring the comparison operation is properly completed

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11996841B2Comparator circuit and driver
Publication Date: 2024.05.28 JVC KENWOOD CORP
  • US11996841B2 patent drawing
  • US11996841B2 patent drawing
  • US11996841B2 patent drawing

AI summary

A comparator circuit according to this embodiment includes: a comparator element configured to output a matching signal indicating whether or not a value of a first input signal matches a value of a second input signal; a flip-flop circuit configured to hold a data of a data input terminal based on a comparator clock signal and configured to output an enable signal for stopping an operation of the comparator element; and an internal signal generation circuit configured to output an internal signal to the data input terminal based on the matching signal and an output signal output from the flip-flop circuit.