Comparator Offset Circuit for Multi-Range ADC Threshold Detection
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Solution Overview
Problem
Conventional analog-to-digital converters require multiple comparators to achieve multiple signal ranges, leading to increased size and power consumption, as each comparator needs distinct threshold voltages, which complicates the digitization process.
Innovation Solution
A comparison circuit utilizing two comparators with different offset voltages and time-to-digital comparators to determine if an input signal's voltage is above or below a middle voltage, effectively reducing the number of required comparators and minimizing area by using built-in offset voltages for threshold determination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple comparators are used to achieve multiple signal ranges for analog-to-digital conversion, then the signal digitization capability is improved, but the size and power consumption of the converter increase
Solution Approach 1:
The patent makes two comparators perform multiple functions by using their built-in offset voltages as threshold voltages. The first comparator with offset voltage Voffset1 and the second comparator with offset voltage Voffset2 can collectively determine multiple signal ranges (higher than max(Voffset1,Voffset2), between max and min, between min and 0) without requiring additional comparators, thus reducing the overall converter size while maintaining multi-range digitization capability
Solution Approach 2:
The patent utilizes the built-in offset voltages of the comparators as threshold voltages for signal comparison. By leveraging the inherent parameter differences (offset voltages) of the comparators, the system achieves multiple threshold levels without requiring multiple separate comparator circuits, thereby reducing area while maintaining signal range determination capability
2Measurement precision
If multiple comparators are used to achieve multiple signal ranges, then the digitization accuracy is improved, but the power consumption increases
Solution Approach 1:
The patent makes two comparators perform multiple functions by using their built-in offset voltages as threshold voltages. The first comparator with offset voltage Voffset1 and the second comparator with offset voltage Voffset2 can collectively determine multiple signal ranges (higher than max(Voffset1,Voffset2), between max and min, between min and 0) without requiring additional comparators, thus reducing power consumption while maintaining multi-range digitization capability
Solution Approach 2:
The patent combines the functionality of multiple comparators into a reduced set of two comparators. By merging the threshold determination function into the built-in offset voltages of the comparators and using logical combination of their outputs, the system achieves the same digitization accuracy with fewer active components, thereby reducing overall power consumption
3Measurement precision
If distinct threshold voltages are assigned to each comparator, then the signal range determination accuracy is improved, but the device complexity increases
Solution Approach 1:
The patent employs the built-in offset voltages of the comparators themselves as the threshold voltages for comparison operations. This self-service approach eliminates the need for external threshold voltage generation circuits and simplifies the overall device configuration while maintaining accurate threshold distinction capability through the inherent offset voltage differences of the comparators
Data Source
AI summary
A comparison circuit is provided and includes first and second comparators and a first time-to-digital comparator. The first comparator with a first offset voltage receives an input signal and generates a first comparison signal and a first inverse comparison signal. The second comparator receives the input signal and generates a second comparison signal and a second inverse comparison signal. The first offset voltage is larger than the second offset voltage. The first time-to-digital comparator receives the first comparison signal and the second inverse comparison signal and generates first and second determination signals according to the first comparison signal and the second inverse comparison signal. The first and second determination signals indicate whether a voltage of the input signal is larger than a first middle voltage. The first middle voltage is equal to a half of the sum of the first offset voltage and the second offset voltage.