Comparator Circuit With Follower-Inverter Offset Compensation

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Solution Overview

Problem

Current comparator implementations face challenges due to the need for closely matched transistors, which can lead to errors in accuracy due to transistor variations, and existing solutions do not effectively address the issue of offset voltages and linearity in comparator circuits.

Innovation Solution

A comparator design that includes a follower stage and an inverter stage with controllable switching and filtering, using tuning means to adjust offset voltages and signal conditioning to improve accuracy, and utilizing N-type or both N-type and P-type transistors to achieve high accuracy and linearity by offsetting threshold voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If closely matched transistors are used in differential mirror current configuration, then comparator accuracy is improved, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvecomparator accuracyVSAvoidtransistor matching requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent changes the operating parameters by using source-coupled logic with reference controlled inputs instead of differential mirror current, and by applying specific voltage levels to control the transistors' operating states, thereby achieving accuracy without requiring close transistor matching

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces reference controlled inputs as an intermediary mechanism that controls the transistor operations, allowing the comparator to achieve precision through controlled voltage references rather than through transistor matching

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If transistor variations are present, then manufacturing ease is improved, but comparator accuracy deteriorates due to amplified error effects

Engineering Contradiction:
Improvetransistor variation toleranceVSAvoidcomparator accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent employs feedback mechanisms through the reference controlled inputs that monitor and adjust the transistor operations, compensating for variations and preventing error amplification while maintaining manufacturing ease

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

By changing the control parameters to use reference voltages and source-coupled logic, the system becomes insensitive to transistor variations, allowing standard manufacturing processes to produce accurate comparators

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If offset voltages are not compensated, then device simplicity is maintained, but measurement precision deteriorates

Engineering Contradiction:
Improvecircuit simplicityVSAvoidoffset voltage accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent introduces reference controlled inputs as intermediary elements that provide controlled voltage references to compensate for offset voltages, achieving precision without significantly increasing circuit complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP3202038B1comparator
Publication Date: 2020.09.16 PRAGMATIC PRINTING LTD
  • EP3202038B1 patent drawingFigure 1~2
  • EP3202038B1 patent drawingFigure 3~4
  • EP3202038B1 patent drawingFigure 5

AI summary

A comparator is disclosed, for comparing a first input voltage (e+) with a second input voltage (e-) and generating a corresponding output voltage (out). The comparator comprises: a first input terminal (e+) for receiving the first input voltage: a second input terminal (e-) for receiving the second input voltage; an output terminal (out) for outputting the output voltage; a first supply rail (VCC) for providing a first supply voltage; and a second supply rail (VDD) for providing a second supply voltage. The comparator further comprises: a follower stage comprising a first follower stage supply terminal coupled to the first supply rail, a second follower stage supply terminal coupled to the second supply rail, a follower stage input terminal coupled to the second input terminal, and a follower stage output terminal for providing a follower stage output voltage; and an inverter stage comprising a first inverter stage supply terminal coupled to the first supply rail, a second inverter stage supply terminal coupled to the follower stage output terminal, an inverter stage input terminal coupled to the first input terminal, and an inverter stage output terminal for providing an inverter stage output voltage and coupled to the output terminal.