Comparator Preamp Sampling to Reduce SAR ADC Conversion Errors
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Solution Overview
Problem
Successive approximation analog-to-digital converters experience conversion errors due to variations in gate capacitance caused by differences in input analog voltages, leading to inaccuracies in digital signal conversion.
Innovation Solution
A comparator circuit with a preamp stage that includes transistors with a third transistor to short-circuit the drain and source of input transistors during sampling, maintaining a constant drain-source voltage drop and equalizing gate capacitance, thereby reducing errors in analog-to-digital conversion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional successive approximation AD converter is used, then the conversion process is simple and fast, but conversion errors occur due to gate capacitance variations
Solution Approach 1:
The third transistor is activated during the sampling period to pre-establish equal gate-source voltage drops across the first and second transistors. This preliminary action equalizes the gate capacitances before the actual voltage sampling occurs, preventing conversion errors while maintaining fast conversion speed
Solution Approach 2:
The invention dynamically changes the drain-source voltage drop parameter of the input transistors during sampling by activating the third transistor. This parameter change ensures that gate-source voltage drops remain equal, thereby maintaining equal gate capacitances and eliminating conversion errors
2Adaptability or versatility
If the difference between input analog voltages is large, then the conversion range is wide, but gate capacitance difference increases causing larger errors
Solution Approach 1:
The third transistor dynamically adjusts the drain-source voltage drop parameter during sampling to compensate for large input voltage differences. By maintaining equal gate-source voltage drops regardless of input voltage magnitude, the gate capacitances remain equal, enabling accurate conversion across wide voltage ranges
Solution Approach 2:
The circuit uses the third transistor as a feedback mechanism that automatically balances the gate-source voltage drops of the input transistors during sampling. This feedback action ensures that even when input voltages differ significantly, the gate capacitances remain equal, maintaining sampling accuracy across the full voltage range
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces errors in sampled analog voltages and suppresses conversion errors, improving the signal-to-noise and distortion ratio (SNDR) and effective number of bits (ENOB) in the analog-to-digital conversion process.
Implementation Method 1
The third transistor is configured to short-circuit a drain and a source of each of the first transistor and the second transistor during a period when the input analog voltage is applied
Data Source
AI summary
A comparator includes a first circuit including first, second, and third transistors, and a second circuit. One of the first transistor and the second transistor in the first circuit is an input transistor to which an input analog voltage is applied. The third transistor is configured to short-circuit a drain and a source of each of the first transistor and the second transistor during a period when the input analog voltage is applied. The second circuit is configured to output a signal indicating a relationship between magnitude of a first output analog voltage and magnitude of a second output analog voltage, the first output analog voltage and the second output analog voltage being output from