Comparator Preamplifier Circuit With Reset-Coupled Load Transistors
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Solution Overview
Problem
Comparator circuits suffer from non-idealities such as noise and mismatch, leading to reduced accuracy in comparing electrical quantities, which can result in incorrect decisions and increased system robustness measures to account for these errors.
Innovation Solution
A preamplifier circuit design that includes a first and second input transistor, load transistors, and a reset switch configuration, where the control terminals of the load transistors are capacitively coupled to the supply node and ground, allowing for improved noise reduction and increased output swing without contributing to power consumption or noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional comparator circuitry is used, then the circuit is simple, but noise and mismatch reduce comparison accuracy
Solution Approach 1:
The comparator is divided into distinct functional stages: a differential input stage with transistors M1 and M2, an intermediate stage with transistors M3 and M4, and a output stage with transistors M5 and M6. This segmentation allows each stage to be optimized independently for noise performance and accuracy while maintaining overall circuit simplicity.
Solution Approach 2:
Different regions of the circuit are designed with specific properties: the input stage uses matched transistors M1 and M2 for differential signaling to reject common-mode noise, the intermediate stage employs transistors M3 and M4 with specific biasing to minimize mismatch effects, and the output stage uses transistors M5 and M6 optimized for drive capability while maintaining low noise.
2Measurement precision
If (pre)amplifiers are added to reduce latch offset and noise, then comparison accuracy improves, but circuit complexity increases
Solution Approach 1:
The patent merges the preamplifier function directly into the comparator structure by using the same transistor pairs (M1-M2, M3-M4, M5-M6) to perform both differential amplification and comparison functions. This integration eliminates the need for separate preamplifier stages and latches, reducing overall circuit complexity while maintaining improved accuracy.
Solution Approach 2:
Each transistor pair in the circuit serves multiple functions: transistors M1 and M2 provide differential input amplification and act as the comparison elements, transistors M3 and M4 provide intermediate amplification and level shifting, and transistors M5 and M6 provide output buffering and drive capability. This multi-functionality reduces the total number of components needed.
3Speed
If load transistors are used to increase output swing, then output range improves, but power consumption increases
Solution Approach 1:
The load transistors M5 and M6 are biased to operate in their linear region rather than saturation, allowing them to dynamically adjust their output impedance based on the signal level. This dynamic operation enables large output swings while maintaining lower power consumption compared to fixed-bias configurations.
Solution Approach 2:
The biasing parameters of the load transistors M5 and M6 are optimized to achieve the desired output swing range. By carefully selecting the bias currents and voltages, the circuit achieves maximum output swing while minimizing power consumption in the load transistors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the accuracy of comparator circuits by reducing noise contributions and power consumption, while maintaining or improving output swing, thus improving system efficiency and robustness.
Implementation Method 1
a capacitance having a first side coupled to the other of the supply node and ground and having a second side, where the control terminal of the first load transistor and the control terminal of the second load transistor are capacitively coupled to each other through the capacitance
Data Source
AI summary
A preamplifier circuit comprises a first pair of transistors and a second pair of transistors having current flow paths therethrough coupled at first and second output nodes and providing first and second current flow lines intermediate a supply node and ground. The two pairs of transistors comprise: first and second input transistors located intermediate the outputs nodes and one of the supply node and ground providing respective input nodes, first and second load transistors intermediate the output nodes and the other of the supply node and ground. The load transistors have control terminals capacitively coupled to the other of the supply node and ground and a reset switch arrangement is provided periodically activatable to short the first output node, the second output node as well as the control terminals of the first load transistor and the second load transistor.