Comparator Input Circuit for Faster Ramp Settling in Image Sensors

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Solution Overview

Problem

The ramp settling time of the ramp signal generated by the ramp generator and received by the comparator in image sensors limits the maximum frame rate of the image sensor, thereby reducing its performance.

Innovation Solution

The implementation of comparator input circuitry that includes a switch and capacitance to provide positive current injection into the ramp signal, compensating for the initial error and reducing the ramp settling time by coupling the capacitance to the reference voltage prior to the ramp event, resulting in a more linear ramp signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a conventional ramp generator is used without compensation circuitry, then the device complexity is low, but the ramp settling time is long which limits the maximum frame rate

Engineering Contradiction:
Improvemaximum frame rateVSAvoidramp settling time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-charging the comparator input capacitance to the reference voltage level before the ramp signal arrives. This preliminary preparation eliminates the initial transient response and allows the comparator to immediately accurately compare the ramp signal with the pixel signal, thereby reducing the ramp settling time and increasing the maximum frame rate without significantly increasing device complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the voltage parameter of the comparator input by dynamically switching the input capacitance between the reference voltage and ground based on the ramp signal phase. During the pre-charge phase, the capacitance is set to reference voltage level; during the comparison phase, it is switched to ground. This parameter change optimizes the comparator performance and reduces settling time

Inventive Principle:
Principle #35Parameter changes

2Loss of time

If a ramp generator with compensation circuitry is used, then the ramp settling time is reduced, but the device complexity increases due to additional switches and capacitance

Engineering Contradiction:
Improveramp settling timeVSAvoidcomparator input circuitry complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent merges the compensation circuitry with the existing comparator input structure by integrating the switching mechanism and capacitance directly into the comparator input stage. This consolidation approach reduces the overall device complexity compared to adding separate compensation circuits, while still achieving reduced ramp settling time through the pre-charge mechanism

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If the comparator input capacitance is not pre-charged, then the ease of operation is high, but the ramp signal linearity is poor causing conversion errors

Engineering Contradiction:
Improveanalog-to-digital conversion accuracyVSAvoidcomparator input circuitry complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-charging the comparator input capacitance to the reference voltage level before the ramp signal arrives. This preliminary preparation eliminates the initial transient response and allows the comparator to immediately accurately compare the ramp signal with the pixel signal, thereby reducing the ramp settling time and increasing the maximum frame rate without significantly increasing device complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using the ramp signal itself to control the switching of the input capacitance. The ramp signal phase determines when the capacitance should be pre-charged to reference voltage and when it should be switched to ground for accurate comparison, creating a feedback-controlled mechanism that improves conversion accuracy

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces the ramp settling time, increasing the maximum frame rate and improving the overall performance of the image sensor by ensuring a more linear and efficient analog-to-digital conversion process.

Implementation Method 1

comparator input circuitry that includes a switch and capacitance to provide positive current injection into the ramp signal

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS10498993B1Ramp signal settling reduction circuitry
Publication Date: 2019.12.03 OMNIVISION TECHNOLOGIES INC
  • US10498993B1 patent drawing
  • US10498993B1 patent drawing
  • US10498993B1 patent drawing

AI summary

Comparison circuitry includes a comparator having a first input configured to receive a pixel signal. A switch is coupled to a second input of the comparator, a reference generator, and a ramp generator. A first capacitance is coupled to the switch. The switch is configured to couple the first capacitance to the reference generator to charge the first capacitance to a reference voltage from the reference generator prior to a ramp event in a ramp signal, and to couple the first capacitance to the ramp signal from the ramp generator at an onset of the ramp event in the ramp signal. The first capacitance is coupled to provide positive current injection into the ramp signal at the onset of the ramp event in the ramp signal to reduce a ramp settling time in the ramp signal, which is provided to the second input of the comparator.