Comparator Self-Test Using Voltage Ramp Timing

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Solution Overview

Problem

Comparator circuits in safety-critical applications face challenges in maintaining accurate and stable reference voltages, which are crucial for reliable fault detection, often requiring additional components for self-testing.

Innovation Solution

A circuit arrangement incorporating a comparator circuit, a time evaluation circuit, and a voltage ramp generation circuit, which enables a self-test mode to generate a voltage ramp, compare it to a reference voltage, and determine the time interval for reaching the reference voltage, allowing for precise adjustment and recalibration of the reference voltage without additional components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If additional components are added to enable self-testing of comparator circuits, then measurement precision and reliability improve, but device complexity increases

Engineering Contradiction:
Improvereference voltage accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The comparator circuit performs self-testing using its own internal resources. The existing comparator circuitry compares a generated test voltage ramp against the reference voltage, eliminating the need for separate self-test components. The time evaluation circuit uses the comparator's own output signals to measure the time interval, making the system self-sufficient for verification purposes.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The comparator circuit serves dual purposes: it performs its primary function of comparing input voltages to reference voltages during normal operation, and simultaneously performs self-testing by comparing a generated voltage ramp to the same reference voltage. This multi-functionality reduces the need for dedicated self-test hardware while maintaining measurement precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If additional components are added for self-testing, then reliability improves, but manufacturing cost increases

Engineering Contradiction:
Improvefault detection capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The self-testing functionality is achieved using existing circuit components rather than adding new parts. The voltage ramp generation circuit uses standard RC timing components, and the comparator circuitry already present in the system is reused for self-verification, minimizing additional manufacturing costs while improving reliability.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If self-test functionality is implemented, then measurement precision improves, but device complexity increases

Engineering Contradiction:
Improvereference voltage verificationVSAvoidcontrol logic complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces complex control logic with a straightforward time-based measurement approach. Instead of using sophisticated algorithms or multiple control circuits to verify reference voltage accuracy, the system simply measures the time interval required for a voltage ramp to reach the reference voltage level. This time measurement can be performed using standard timing circuits, substituting mechanical/control complexity with a simpler physical measurement principle.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS20250355042A1Comparator circuit self-test
Publication Date: 2025.11.20 INFINEON TECHNOLOGIES AG
  • US20250355042A1 patent drawing
  • US20250355042A1 patent drawing
  • US20250355042A1 patent drawing

AI summary

A circuit arrangement comprises a comparator circuit configured for comparing a voltage to a provided reference voltage and a time evaluation circuit configured for determining a time interval between a start signal and a stop signal. The circuit arrangement further comprises a voltage ramp generation circuit configured for generating a voltage ramp beginning with the start signal. In a normal operation mode, the circuit arrangement is configured for comparing an input voltage to the reference voltage by using the comparator circuit. In a self-test mode for performing a self-test of the comparator circuit, the circuit arrangement is configured for generating a voltage ramp by using the voltage ramp generation circuit, for continuously comparing the generated voltage ramp to the reference voltage by using the comparator circuit and for determining a time interval in which the generated voltage ramp reaches the reference voltage by using the time evaluation circuit.