Comparator-Based Skew Correction Circuit for High-Speed SPI

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Solution Overview

Problem

High load capacitance in devices such as display modules reduces the maximum operating frequency, and enlarging the SPI pad size to increase frequency leads to noise generation, while conventional skew correction methods using flip-flops can malfunction due to variable line delay and jitter.

Innovation Solution

A skew correction circuit and method that combines delay circuits and flip-flops, utilizing a controller to detect and apply skew correction values in both skew correction and normal operation modes, and optionally includes a Linear Feedback Shift Register (LFSR) to enhance accuracy, allowing for high-speed operation with minimal SPI pad size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the SPI pad size is enlarged to increase operating frequency, then the maximum operating frequency increases, but significant noise is generated

Engineering Contradiction:

Improveoperating frequencyVSAvoidnoise

Core Design Contradiction:

SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent changes the timing parameters of data transmission by introducing skew correction. The transmitter adjusts the timing of data signals relative to clock signals using detected skew values, enabling high-speed operation without requiring enlarged pad sizes, thus avoiding noise generation while maintaining increased operating frequency

Inventive Principle:

Principle #35Parameter changes

2Quantity of substance

If an increase in load capacitance occurs in display modules, then the maximum operating frequency is reduced

Engineering Contradiction:

Improveload capacitanceVSAvoidmaximum operating frequency

Core Design Contradiction:

Quantity of substanceVSSpeed

Solution Approach 1:

The patent implements a feedback mechanism where the receiver detects skew between clock and data signals and communicates correction values back to the transmitter. This feedback loop enables the system to adapt to varying load capacitance conditions by adjusting timing parameters, thereby maintaining high operating frequency despite increased capacitance in display modules

Inventive Principle:

Principle #23Feedback

3Reliability

If conventional skew correction methods using flip-flops are used, then skew correction can be performed, but the system can malfunction due to variable line delay and jitter

Engineering Contradiction:

Improveskew correction stabilityVSAvoidline delay variation sensitivity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces traditional flip-flop-based skew correction with a comparator-based detection system. Instead of relying on clocked flip-flops that are sensitive to timing variations, the system uses comparators to detect skew conditions and generates correction values based on direct signal comparisons, eliminating sensitivity to line delay variations and jitter while improving reliability

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS20260050286A1Skew correction circuit and method thereof

Publication Date: 2026.02.19 MAGNACHIP SEMICON LTD

AI summary

A skew correction circuit includes a skew value detector configured to delay input data and detect a skew correction value for performing skew correction between a data signal and a clock signal, the skew value detector including a first comparator configured to compare the input data with a capture clock signal and detect a Pass or Fail result; and a controller configured to utilize the skew correction value detected.