Comparator Circuit with Tunable Offset and Full-Digital Output
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Solution Overview
Problem
Current comparator implementations face accuracy issues due to the need for closely matched transistors, which are prone to errors from even small variations in transistor properties, affecting the precision of voltage comparisons.
Innovation Solution
A comparator design incorporating a follower stage and an inverter stage with adjustable offset voltages using tuning means, such as resistors, and signal conditioning to convert 'half-digital' signals to 'full-digital' signals, allowing for improved accuracy without requiring closely matched transistors, and optionally utilizing a DC to DC converter and filtering to enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If differential mirror current with amplification stage is used, then voltage comparison function is achieved, but transistor mismatch errors are amplified
Solution Approach 1:
The comparator is divided into two independent stages: a follower stage that buffers the reference voltage without amplification, and an inverter stage that performs the actual comparison. This segmentation prevents error amplification by eliminating the differential mirror current amplification mechanism while maintaining comparison functionality through voltage buffering and inversion.
Solution Approach 2:
The invention extracts and removes the problematic differential mirror current amplification stage from the traditional comparator architecture. By taking out the amplification function and replacing it with a non-amplifying follower stage, the design eliminates the mechanism that amplifies transistor mismatch errors while preserving the voltage comparison capability.
2Measurement precision
If closely matched transistors are used, then comparator accuracy is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The follower stage uses a dynamically adjustable reference voltage that can be tuned to compensate for transistor variations. By making the reference voltage adjustable rather than relying on fixed transistor matching, the design achieves high accuracy with standard, easily manufactured transistors that do not require close matching.
Solution Approach 2:
The invention changes the operating parameters by using a follower configuration with adjustable reference voltage instead of fixed differential amplification. This parameter change allows the use of standard transistors with typical variations while maintaining high accuracy through voltage adjustment rather than requiring precisely matched transistor parameters.
3Measurement precision
If follower stage with adjustable offset is used, then offset voltage matching between stages is improved, but device complexity increases
Solution Approach 1:
The adjustable reference voltage in the follower stage provides a feedback mechanism for offset compensation. By feeding back an adjustable voltage to the follower input, the design automatically compensates for offset voltage mismatches between stages, improving accuracy while keeping the tuning mechanism simple and integrated into the normal signal path.
Data Source
AI summary
A comparator is disclosed, for comparing a first input voltage with a second input voltage and generating a corresponding output voltage. The comparator includes a follower stage coupled to a first supply rail and a second supply rail, a follower stage input terminal for the second input voltage, and a follower stage output terminal. The comparator also includes an inverter stage comprising a first inverter stage supply terminal coupled to the first supply rail, a second inverter stage supply terminal coupled to the follower stage output terminal, an inverter stage input terminal for the first input voltage, and an inverter stage output terminal for providing an inverter stage output voltage having a first range. A signal conditioning means is coupled to the inverter stage output terminal and generates a comparator output voltage at a comparator output terminal having a second range larger than the first range.