Comparator Voltage Partitioning for Fast, Low-Power ADC Decisions
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Solution Overview
Problem
In solid-state imaging apparatuses, there is a challenge in manufacturing comparators that balance decision speed and power consumption, especially when area constraints limit circuit accommodation, leading to reduced decision speed or increased power consumption.
Innovation Solution
A comparator design incorporating a differential input circuit operating at a first power source voltage, a positive feedback circuit operating at a lower second power source voltage to speed up transition times, and a voltage converting circuit to adapt signals, with the differential input circuit's source voltage set lower than 0 V, enhancing decision speed while reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the comparator circuit is designed with sufficient size to achieve high decision speed, then the decision speed is improved, but the area occupied by the circuit increases
Solution Approach 1:
The patent applies different voltage levels to different parts of the comparator circuit: the differential input circuit operates at a first voltage level while the positive feedback circuit operates at a second voltage level. This local differentiation allows each part to be optimized independently, enabling high decision speed in the feedback circuit while keeping the overall circuit area compact.
Solution Approach 2:
The patent changes the voltage parameter across different circuit stages. By operating the differential input circuit at a first voltage and the positive feedback circuit at a second voltage, the patent optimizes the decision speed without requiring a uniformly large circuit area, thus resolving the contradiction between speed and area.
2Area of stationary object
If the comparator circuit is miniaturized to fit area constraints, then the area is reduced, but the decision speed decreases
Solution Approach 1:
The patent applies different voltage levels to different parts of the comparator circuit: the differential input circuit operates at a first voltage level while the positive feedback circuit operates at a second voltage level. This local differentiation allows each part to be optimized independently, enabling high decision speed in the feedback circuit while keeping the overall circuit area compact.
Solution Approach 2:
The patent changes the voltage parameter across different circuit stages. By operating the differential input circuit at a first voltage and the positive feedback circuit at a second voltage, the patent optimizes the decision speed without requiring a uniformly large circuit area, thus resolving the contradiction between speed and area.
3Speed
If the power source voltage is increased to enhance decision speed, then the decision speed is improved, but the power consumption increases
Solution Approach 1:
The patent applies different voltage levels to different parts of the comparator circuit: the differential input circuit operates at a first voltage level while the positive feedback circuit operates at a second voltage level. This local differentiation allows each part to be optimized independently, enabling high decision speed in the feedback circuit while keeping the overall circuit area compact.
Solution Approach 2:
The patent changes the voltage parameter across different circuit stages. By operating the differential input circuit at a first voltage and the positive feedback circuit at a second voltage, the patent optimizes the decision speed without requiring a uniformly large circuit area, thus resolving the contradiction between speed and area.
Data Source
AI summary
The present disclosure relates to a comparator, an AD converter, a solid-state imaging apparatus, an electronic apparatus, and a method of controlling a comparator each of which enables power consumption to be reduced while a decision speed of the comparator is enhanced. A comparator, including: a differential input circuit operating at a first power source voltage, and outputting a signal when a voltage of an input signal is higher than a voltage of a reference signal; a positive feedback circuit operating at a second power source voltage lower than the first power source voltage, and speeding up a transition speed when a comparison result signal representing a result of comparison in voltage between the input signal and the reference signal is inverted; and a voltage converting circuit. The present disclosure can be applied to an ADC or the like arranged for each pixel of a solid-state imaging apparatus.