Compare-and-swap transaction data field packing

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Solution Overview

Problem

Existing data processing systems face inefficiencies in performing compare-and-swap transactions due to the need for shifting and alignment of data values, which increases latency and circuit overhead, especially when handling atomic operations across shared resources.

Innovation Solution

The system optimizes compare-and-swap transactions by packing the compare data value into a specific region of the data field aligned with the target data value's position, allowing for immediate comparison without shifting, and optionally packing the swap data value adjacent to it, depending on the target address alignment, to reduce latency and circuit complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the compare data value is packed into a fixed region of the data field, then the transaction format is simple, but shifting and alignment operations are required increasing latency

Engineering Contradiction:
Improvetransaction latencyVSAvoidprocessing logic complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the data field structure adaptive rather than fixed. The position of the compare data value within the data field dynamically changes based on the offset portion of the target address, allowing the system to eliminate shifting operations while maintaining flexibility for different address alignments.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of data field structure from static to variable. By varying the position of the compare data value within the data field according to the target address offset, the system optimizes the comparison operation by ensuring the compare data value is always at the correct position without requiring additional shifting operations.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If shifting operations are performed to align data values, then correct comparison is achieved, but circuit overhead and processing time increase

Engineering Contradiction:
Improvedata alignment accuracyVSAvoidcircuit overhead
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-positioning the compare data value in the data field at the correct location corresponding to the target data value position before the comparison operation occurs. This eliminates the need for shifting operations during the actual comparison, reducing both circuit overhead and processing time while maintaining alignment accuracy.

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If the compare data value position is adjusted based on target address offset, then no shifting is needed reducing latency, but the transaction encoding becomes more complex

Engineering Contradiction:
Improveprocessing latencyVSAvoidtransaction encoding complexity
Core Design Contradiction:
Loss of timeVSEase of manufacture

Solution Approach 1:

The patent applies universality by designing the data field structure to serve multiple purposes: it not only transports the compare data value and swap data value but also inherently encodes the alignment information through the variable positioning of the compare data value. This multi-functional approach eliminates the need for separate alignment operations while maintaining a unified transaction format.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3580657B1Compare-and-swap transaction
Publication Date: 2021.02.24 ARM LTD
  • EP3580657B1 patent drawingFigure 1
  • EP3580657B1 patent drawingFigure 2
  • EP3580657B1 patent drawingFigure 3~4

AI summary

A compare and swap transaction can be issued by a master device to request a processing unit to select whether to write a swap data value to a storage location corresponding to a target address in dependence on whether a compare data value matches a target data value read from the storage location. The compare and swap data values are transported within a data field of the compare and swap transaction. The compare data value is packed into a first region of the data field in dependence of an offset portion of the target address and having a position within the data field corresponding to the position of the target data value within the storage location. This reduces latency and circuitry required at the processing unit for handling the compare and swap transaction.