Compiler Auxiliary Register Sharing for Error Detection
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Solution Overview
Problem
Existing compiler systems face inefficiencies and performance degradation due to improper decomposition of instructions when handling constants that overflow the instruction format width, leading to inefficient code size and register misuse, which complicates error detection and software development.
Innovation Solution
A compiler system that includes a first use instruction judging unit and a second use instruction generating unit to automatically share processor resources, allowing the auxiliary register to be used efficiently for both general and decomposed instruction purposes, and includes a designation receiving unit to specify resource use, enhancing error detectability and development efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the auxiliary register is reserved for instruction decomposition, then error detectability is improved, but register pressure increases and hardware use efficiency decreases
Solution Approach 1:
The auxiliary register's function is made dynamic rather than static. The register is allocated for instruction decomposition only when needed (when constants overflow), and released for general use when not needed. This dynamic allocation is achieved through compiler flags that control the behavior at different compilation stages, allowing the same register to serve multiple purposes at different times.
Solution Approach 2:
The auxiliary register is designed to serve multiple functions: it can be used for instruction decomposition when constants overflow, and simultaneously serve as a general-purpose register when not needed for decomposition. This multi-functionality eliminates the need to reserve the register exclusively, thereby improving hardware use efficiency while maintaining error detectability through conditional allocation.
2Reliability
If instructions are decomposed into several instructions when compiling, then error detectability is improved, but code size increases and compilation efficiency decreases
Solution Approach 1:
The instruction decomposition is made conditional rather than unconditional. The compiler dynamically determines whether to decompose instructions based on whether constant values actually overflow the instruction format width. This is controlled by compilation flags that enable or disable decomposition behavior, allowing the compiler to optimize code size by avoiding unnecessary decomposition while maintaining error detectability when decomposition is actually needed.
3Productivity
If the auxiliary register is shared for general register use, then hardware use efficiency improves, but error detectability decreases
Solution Approach 1:
The system implements feedback mechanisms through compilation flags that provide information about register usage and decomposition needs. The compiler uses this feedback to make informed decisions about whether to allocate the auxiliary register for decomposition or general use, and whether to decompose instructions. This feedback loop maintains error detectability by ensuring that when the auxiliary register is shared, the compiler is aware of the usage context and can generate appropriate code.
Solution Approach 2:
The compiler performs preliminary analysis during the compilation process to determine whether the auxiliary register will be needed for instruction decomposition. Based on this preliminary action, the compiler can proactively allocate or release the register before actual code generation, ensuring that error detectability is maintained when decomposition is needed while allowing general use when it is not, thereby improving hardware use efficiency.
Data Source
AI summary
The present invention effectively utilizes auxiliary registers and provides a compiler system which secures error detectability when the auxiliary registers are shared for plural uses. The instruction definition resource configuring unit configures, as preparation for processing by the register assigning unit, respective resources such as a register to be defined or referred to by for each instruction in an intermediate code. The instruction definition resource configuring unit detects possibility of instructions each of which is to be decomposed into plural instructions. As for an instruction to be possibly decomposed, the instruction definition resource configuring unit configures a corresponding register in the intermediate code, assuming the corresponding register used for the decomposition to be defined and referred. The register assigning unit uses the register as a general register as far as a live range of the register used for the decomposition does not overlap.