Compiler Heuristic Scheduling for Basic Block Optimization

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Solution Overview

Problem

Existing compilers apply optimizations uniformly across all basic blocks of instructions, which may not lead to the most optimized scheduling for software applications, as each block has unique performance metrics and constraints.

Innovation Solution

A compiler generates multiple basic blocks of instructions and determines specific heuristics for each block to evaluate and apply optimizations, considering a combination of heuristics to achieve the most desirable overall optimization for the software application by scheduling instructions within each block based on estimated performance metrics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If uniform optimizations are applied across all basic blocks, then the compilation process is simple and consistent, but the performance metrics such as register pressure, latency, and code size are not optimally improved

Engineering Contradiction:
Improvesoftware application performanceVSAvoidoptimization process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the optimization process into segments by analyzing each basic block independently. The compiler identifies multiple basic blocks within a function and applies customized optimization strategies to each block based on its specific characteristics, rather than applying a single uniform optimization across the entire function. This segmentation enables tailored optimization that improves performance metrics while managing complexity through modular processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by determining distinct optimization strategies for different basic blocks based on their individual performance characteristics. Each basic block receives customized optimization treatment tailored to its specific register pressure, latency requirements, and code size considerations. This local optimization approach ensures that each block is optimized for its particular context rather than applying a one-size-fits-all solution.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If customized heuristics are determined for each basic block, then optimization effectiveness is improved, but the compiler complexity and processing time increase

Engineering Contradiction:
Improveinstruction scheduling optimizationVSAvoidcompiler structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The compiler structure is segmented into distinct modules that handle different aspects of basic block optimization independently. Each basic block is processed through a standardized workflow that determines customized heuristics based on block-specific metrics. This modular segmentation allows the compiler to achieve high optimization precision while managing complexity through organized, reusable processing components rather than monolithic complex logic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes parameter changes by adjusting optimization parameters and heuristics based on the specific characteristics of each basic block. The compiler analyzes metrics such as register pressure, execution latency, and code size for each block and modifies optimization parameters accordingly. This dynamic parameter adjustment enables precise optimization tailored to each block's performance requirements while maintaining a systematic compiler architecture.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If multiple heuristics are evaluated and combined for each basic block, then the overall optimization quality improves, but the computational overhead during compilation increases

Engineering Contradiction:
Improvesoftware application performanceVSAvoidcompilation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies partial action by selectively evaluating and combining heuristics based on the specific needs of each basic block. Rather than exhaustively evaluating all possible optimization combinations for every block, the compiler identifies and applies the most relevant heuristics for each block's characteristics. This selective approach achieves high optimization quality while reducing unnecessary computational overhead and compilation time.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The compiler dynamically changes optimization parameters and heuristic selection based on the performance metrics of each basic block. By analyzing block-specific characteristics such as register pressure and latency requirements, the compiler adjusts which heuristics are evaluated and combined, avoiding unnecessary computational effort for blocks that don't require extensive optimization. This parameter-driven approach balances optimization quality with compilation efficiency.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3906470B1Techniques for scheduling instructions in compiling source code
Publication Date: 2023.11.01 MICROSOFT TECHNOLOGY LICENSING LLC
  • EP3906470B1 patent drawingFigure 1
  • EP3906470B1 patent drawingFigure 2
  • EP3906470B1 patent drawingFigure 3

AI summary

Examples described herein generally relate to generating, from a listing of source code, a plurality of basic blocks for compiling into intermediate language, determining, for a first basic block of the plurality of basic blocks, first heuristics related to applying a first plurality of optimizations to the first basic block, determining, for a second basic block of the plurality of basic blocks, second heuristics related to applying a second plurality of optimizations to the second basic block, and applying, based on the first heuristics and the second heuristics, one of the first plurality of optimizations to the first basic block to schedule first instructions for the first basic block and one of the second plurality of optimizations to the second basic block to schedule second instructions for the second basic block.