Compiler Code Segmentation for Multi-Processor Hardware Acceleration
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Solution Overview
Problem
Current code compilation and execution efficiency is relatively low due to the lack of effective allocation of executable code to processors with a higher matching degree.
Innovation Solution
A compiler allocates code segments to processors based on their matching capabilities by identifying first and second code types and generating corresponding executable code for each processor, ensuring efficient execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If source code is compiled into target code and executed by a single CPU, then the system structure is simple and ease of operation is maintained, but code execution efficiency is relatively low
Solution Approach 1:
The patent segments the compilation process into multiple compilation units, each responsible for compiling code segments for specific processors (CPU, GPU, NPU, etc.). This allows the system to generate optimized executable code for different hardware architectures simultaneously, improving execution efficiency without requiring a complete rewrite of the compilation system.
Solution Approach 2:
The patent creates a universal compilation framework that can handle multiple processor types through a single compiler system. The compilation unit is designed to generate executable code adaptable to different processor architectures (CPU, GPU, NPU, DSP, FPGA), allowing one compilation system to serve multiple functions and processor types.
2Speed
If code is compiled for general-purpose CPU, then adaptability is high and ease of operation is maintained, but execution speed for specific computational tasks is insufficient
Solution Approach 1:
The patent applies local quality by optimizing code compilation for specific processor types based on the computational characteristics of different code segments. High-performance computing tasks are compiled for specialized processors (GPU, NPU, DSP) that have local quality optimized for those specific operations, while general control logic remains on the CPU.
Solution Approach 2:
The compilation system dynamically selects which processor type to use for compiling specific code segments based on the computational requirements. The system can adaptively determine whether to compile for CPU, GPU, NPU, or other processors depending on the task characteristics, making the compilation process dynamic rather than static.
Data Source
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AI summary
Embodiments of the present invention disclose a hardware acceleration method, a compiler, and a device, to improve code execution efficiency and implement hardware acceleration. The method in the embodiments of the present invention includes: obtaining, by a compiler, compilation policy information and source code, where the compilation policy information indicates that a first code type matches a first processor and a second code type matches a second processor; analyzing, by the compiler, a code segment in the source code according to the compilation policy information, and determining a first code segment belonging to the first code type or a second code segment belonging to the second code type; and compiling, by the compiler, the first code segment into first executable code, and sending the first executable code to the first processor; and compiling the second code segment into second executable code, and sending the second executable code to the second processor.