Compiler Optimization for Control Flow Divergence in Graphics Processors

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Solution Overview

Problem

Graphics processor efficiency is reduced due to control flow divergence in SIMD operations, leading to underutilization of resources and power inefficiency, especially when control flow paths are divergent.

Innovation Solution

Compiler optimizations that utilize shared local memory to modify instruction control flow during compilation, converting divergent control flows into structured flows and synchronizing thread groups to execute parallel operations without divergence, thereby optimizing shader code to enhance SIMD utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If SIMD operations are used to process data in parallel, then computational efficiency and power efficiency are improved, but control flow divergence causes underutilization of resources and reduces power efficiency

Engineering Contradiction:

Improvecomputational efficiencyVSAvoidpower efficiency

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The compiler performs preliminary analysis of control flow constructs during compilation, identifying divergent branches before execution. It transforms the control flow structure in advance by introducing synchronization points and reorganizing instructions, ensuring that threads are synchronized before divergent operations and can execute in parallel when possible, thereby maximizing SIMD utilization and computational efficiency while minimizing power consumption

Inventive Principle:

Principle #10Preliminary action

2Adaptability or versatility

If control flow constructs are divergent, then program flexibility and adaptability are improved, but SIMD processing becomes less power efficient and resources are underutilized

Engineering Contradiction:

Improvecontrol flow flexibilityVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

The compiler segments the control flow by introducing synchronization points that divide the execution flow into distinct phases. Threads are grouped and synchronized at these points, allowing divergent control flow constructs to be managed in segments rather than continuously. This segmentation enables parallel execution within synchronized groups while maintaining the flexibility of divergent paths, improving power efficiency without sacrificing program adaptability

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The compiler introduces synchronization points as intermediary constructs between divergent control flow branches. These synchronization points act as mediators that coordinate thread execution, allowing threads to diverge into different control paths while ensuring proper synchronization before subsequent operations. This intermediary mechanism maintains control flow flexibility while enabling efficient SIMD parallel execution, reducing power consumption

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10242419B2Compiler optimization to reduce the control flow divergence

Publication Date: 2019.03.26 INTEL CORP

AI summary

In one embodiment a graphics processing system comprises a graphics processor having execution logic and shared memory and a shader compiler unit to compile a shader program for execution by the execution logic of the graphic processor, wherein the shader is to optimize the shader program during the compile, wherein to optimize the shader program includes to convert a divergent block of parallel instructions into a divergent block and a non-divergent block of instructions.