Compiler Data Dependence Analysis via Static Single Assignment Graphs

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Solution Overview

Problem

Existing methods struggle to effectively analyze data dependence relationships between instructions, leading to inefficient compilation processes and wastage of computing resources due to complex memory area definitions.

Innovation Solution

A method is introduced that constructs a program into a static single assignment form control flow graph, sets initial memory descriptor information, and iteratively updates define and kill set information to compute data dependence relationships, creating define-use and use-define chains for instruction compilation optimization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Difficulty of detecting and measuring

If existing technology is used to analyze data dependence relationships between instructions, then the compilation process can proceed, but the analysis becomes difficult and computing resources are wasted due to complex memory area definitions

Engineering Contradiction:
Improvedifficulty of analyzing data dependence relationshipsVSAvoidwasting of computing resources
Core Design Contradiction:
Difficulty of detecting and measuringVSLoss of energy

Solution Approach 1:

The patent segments the complex memory area analysis into distinct components by introducing memory descriptors that separate define information, use information, and kill set information. This segmentation allows the compiler to analyze data dependence relationships in a structured manner, reducing the difficulty of detection and measuring while avoiding wasteful computation through targeted analysis of specific memory regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces memory descriptors as intermediary structures that mediate between instructions and memory areas. These descriptors act as intermediaries that capture and organize information about memory definitions, uses, and kills, enabling efficient data dependence analysis without directly analyzing complex memory area overlaps, thus reducing both analytical difficulty and computational resource waste.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If memory area definitions are analyzed in detail to compute data dependence relationships, then analysis accuracy improves, but computational overhead increases

Engineering Contradiction:
Improveprecision of data dependence analysisVSAvoidcomputational overhead
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent performs preliminary action by pre-computing and storing define information, use information, and kill set information in memory descriptors during the control flow graph construction phase. This preliminary organization of memory analysis data enables precise data dependence relationships to be determined later without repeating expensive computational operations, thus maintaining high measurement precision while reducing computational overhead during execution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameters of memory analysis by transforming detailed memory area definitions into discrete memory descriptor parameters (define sets, use sets, kill sets). This parameter transformation allows precise tracking of data dependencies through set operations rather than continuous memory area analysis, achieving high precision with reduced computational overhead through efficient set-based calculations.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20230195599A1Method for computing data dependence relationship in program, and computer readable storage medium
Publication Date: 2023.06.22 CAMBRICON (XIAN) SEMICON CO LTD
  • US20230195599A1 patent drawing
  • US20230195599A1 patent drawing
  • US20230195599A1 patent drawing

AI summary

The present disclosure relates to a method for computing data dependence relationships in a program and a computer readable storage medium, which are applied to a computing apparatus. The computing apparatus is included in an integrated circuit apparatus. The integrated circuit apparatus includes a general interconnection interface and other processing apparatus. The computing apparatus interacts with other processing apparatus to jointly complete a computing operation specified by a user. The integrated circuit apparatus further includes a storage apparatus. The storage apparatus is connected to the computing apparatus and other processing apparatus, respectively. The storage apparatus is used for data storage of the computing apparatus and other processing apparatus.