Compiler Failure Verification via Variable Value Generation
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Solution Overview
Problem
In the context of compiler failures, the reduced number of engineers proficient in languages like COBOL and FORTRAN complicates the verification of logic, leading to increased time and difficulty in determining the influence of failures on system operations.
Innovation Solution
A generation apparatus that includes a memory for storing variable value information and a processor to generate machine language instructions, which, when a specific type of variable name is encountered, uses this information to produce multiple machine language instructions associated with variable names, facilitating faster failure identification and verification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual verification of compiler failure influence is performed by maintenance personnel, then accuracy in determining system impact is achieved, but time consumption increases significantly
Solution Approach 1:
The system performs preliminary actions by automatically generating occurrence conditions and verifying failure influence before manual intervention is needed. The verification unit pre-checks whether generated occurrence conditions actually trigger the compiler failure, so when maintenance personnel need to investigate, the work is already partially done, reducing their time consumption while maintaining verification accuracy
Solution Approach 2:
The invention introduces an intermediary verification unit that acts as a bridge between the compiler failure and manual verification. This unit automatically generates occurrence conditions, executes them, and verifies whether the failure occurs, thereby mediating the verification process and reducing the time burden on maintenance personnel while preserving accuracy
2Reliability
If comprehensive logic verification is performed to ensure accurate failure impact assessment, then verification reliability is improved, but the complexity of the verification process increases
Solution Approach 1:
The verification process is segmented into distinct functional units: a generation unit that creates occurrence conditions, an execution unit that runs them, and a verification unit that checks results. This segmentation allows comprehensive logic verification to be broken down into manageable, automated steps, maintaining reliability while reducing the perceived complexity through modular design
Solution Approach 2:
The system performs self-service verification by automatically generating occurrence conditions, executing them, and verifying failure impact without requiring manual intervention for each step. The verification unit autonomously determines whether generated conditions trigger the compiler failure, ensuring reliable assessment while simplifying the process complexity through automation
3Reliability
If multiple variable value candidates are generated for each variable name, then the completeness of failure scenario coverage is improved, but the quantity of generated instructions increases
Solution Approach 1:
The system applies partial action by generating multiple variable value candidates only when necessary for complete failure scenario coverage. The verification unit determines which variable assignments are needed to trigger the compiler failure, generating just enough instructions to achieve comprehensive coverage without unnecessarily multiplying the instruction quantity
Data Source
AI summary
A generation apparatus includes a memory configured to store variable value information indicating variable value candidates for each variable name, and a processor configured to generate a first machine language instruction corresponding to a first code in response to receiving designation of the first code included in codes generated by a compiler, and when the generated first machine language instruction includes a variable name of a specific type, by reference to the variable value information stored in the memory, perform generation of a plurality of machine language instructions based on a plurality of pieces of variable value information associated with each of one or more variable names included in the generated first machine language instruction.