Compiler-Generated Invocation Stubs for Data Parallel Programming
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current data parallel programming requires sophisticated programmers familiar with specific hardware, leading to compatibility issues and a lack of general-purpose solutions that allow programmers to focus on high-level logic rather than hardware implementation details.
Innovation Solution
The development of techniques for generating invocation stubs that bridge logical data parallel computations to physical hardware, enabling data parallel programming in a declarative, reusable, and portable manner, using a compiler to map input data to unit data parallel computations and allocate resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data parallel programming is implemented with hardware-specific implementations, then execution efficiency on target hardware is improved, but programmer complexity and hardware compatibility requirements worsen
Solution Approach 1:
The patent introduces a compiler as an intermediary between the programmer and hardware-specific data parallel implementations. The compiler translates high-level declarative code into hardware-specific parallel code, eliminating the need for programmers to directly understand hardware architecture while maintaining execution efficiency through optimized code generation
Solution Approach 2:
The patent separates the programming task into two distinct layers: a high-level declarative layer for expressing computational logic and a hardware-specific implementation layer for execution. This segmentation allows programmers to work at the abstract level while the compiler handles the complex hardware-specific transformations
2Productivity
If data parallel programs are written for specific hardware architectures, then performance on that hardware is optimized, but portability to other hardware platforms deteriorates
Solution Approach 1:
The patent creates a universal high-level declarative programming interface that can target multiple different hardware architectures. The same source code can be compiled for different data parallel hardware platforms, providing portability while the compiler optimizes for each specific target architecture's characteristics
3Ease of operation
If traditional single-core CPUs are used, then programming simplicity is maintained, but data parallel processing capability is lost
Solution Approach 1:
The patent enables traditional single-core style programming to automatically utilize data parallel hardware capabilities through the compiler. The compiler analyzes the high-level code and automatically generates appropriate parallel implementations, allowing programmers to write simple sequential-style code that executes efficiently on parallel hardware
Data Source
AI summary
Described herein are techniques for generating invocation stubs for a data parallel programming model so that a data parallel program written in a statically-compiled high-level programming language may be more declarative, reusable, and portable than traditional approaches. With some of the described techniques, invocation stubs are generated by a compiler and those stubs bridge a logical arrangement of data parallel computations to the actual physical arrangement of a target data parallel hardware for that data parallel computation.