Compiler Instruction Scheduler for Load Balancing
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Solution Overview
Problem
The challenge in compiler design is to select an optimal assembly instruction sequence for intermediate representation (IR) instructions, which can lead to uneven load distribution across processor execution units, potentially reducing system performance due to repeated execution by a single unit while others remain idle.
Innovation Solution
An information processing apparatus that includes an alternate pattern identifier, a pattern selector, and an instruction scheduler to identify and select optimal assembly instruction sequences based on operator ratios, allowing for balanced execution across multiple execution units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single optimal assembly instruction sequence is selected for repeated IR instruction sequences, then the code generation is simplified, but the load on a single execution unit increases causing other execution units to remain idle
Solution Approach 1:
The patent segments the selection of assembly instruction sequences by dividing the set of alternative sequences into multiple groups, where each group is assigned to a different execution unit. This allows the compiler to distribute intermediate representation (IR) instruction sequences to different execution units based on the type of assembly instruction sequence selected, thereby balancing the load across multiple execution units and improving system performance.
2Productivity
If assembly instruction sequences are distributed across multiple execution units, then system performance improves, but the complexity of instruction selection increases
Solution Approach 1:
The patent applies preliminary action by pre-classifying alternative assembly instruction sequences into different groups based on their characteristics before the actual code generation process. The compiler determines ratios for different types of assembly instruction sequences in advance and uses these pre-established categories to efficiently distribute IR instruction sequences to appropriate execution units, reducing the complexity of real-time decision making.
Solution Approach 2:
The patent changes the parameter of instruction selection by introducing ratio-based selection instead of traditional single-optimal selection. The compiler determines ratios for different types of assembly instruction sequences and uses these ratios to guide the distribution of IR instruction sequences to different execution units, transforming the selection process from a deterministic single-choice problem to a probabilistic multi-choice problem that better utilizes hardware resources.
3Stability of the object's composition
If the same assembly instruction sequence is used for all IR instruction sequences, then consistency is maintained, but execution units become unbalanced causing idle time
Solution Approach 1:
The patent introduces dynamics into the instruction selection process by making the selection of assembly instruction sequences adaptive rather than static. Instead of using the same assembly instruction sequence for all IR instruction sequences, the compiler dynamically selects from multiple alternative sequences based on determined ratios, allowing the system to adapt to the capabilities and current state of different execution units, thereby reducing idle time and improving overall efficiency.
Data Source
AI summary
An information processing apparatus according to one of exemplary aspects of the present disclosure includes: an alternate pattern identifier 862 that identifies first instruction sequences in a program in a first language, each of the first instruction sequences leading to a result individually achieved by second instruction sequences in a second language different from the first language, the second instruction sequences including operators being common to the first instruction sequences; a pattern selector 865 that determines ratios for the operators of the second instruction sequences; and an instruction scheduler 870 that selects a second instruction sequence based on the ratios from the second instruction sequences for each of the first instruction sequences.