Compiler-Driven Memory Address Mapping Optimization
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Solution Overview
Problem
The unalterable mapping relationship between logical and device addresses in memory systems leads to increased miss ratios in memory accesses, resulting in inefficient memory operations.
Innovation Solution
A memory system where a compiler generates instructions and device addresses for memory allocation, allowing for optimization of memory access by adjusting the mapping between logical and device addresses, and a tuner evaluates performance metrics to determine optimal parameters for memory allocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the mapping relationship between logical addresses and device addresses is constructed within the memory controller, then the mapping relationship is fixed and cannot be altered, but this leads to increased miss ratio and reduced memory access efficiency
Solution Approach 1:
The patent applies dynamics by making the address mapping relationship changeable rather than fixed. The compiler generates device addresses based on logical addresses at compile time, allowing the mapping to be optimized for specific access patterns. This dynamic approach enables the system to adapt the mapping relationship to minimize miss ratios while maintaining reliability through the structured compilation process.
Solution Approach 2:
The patent applies preliminary action by performing address mapping optimization during the compilation phase before the program executes. The compiler analyzes access patterns and generates optimized device address mappings in advance, so that when the program runs, the memory access efficiency is already optimized without requiring runtime adjustments.
2Quantity of substance
If a large search space is used within the memory device, then more memory space is available, but the miss ratio of missed accesses increases
Solution Approach 1:
The patent applies parameter changes by transforming the address space parameters through the compiler. The compiler maps logical addresses to device addresses using optimized transformations that consider access patterns, effectively changing the address space parameters to minimize the search space while maintaining the required memory capacity. This reduces miss ratios without sacrificing memory space availability.
3Adaptability or versatility
If random memory accesses are made to the memory device, then flexibility in access patterns is achieved, but the miss ratio increases due to large search space
Solution Approach 1:
The patent applies preliminary action by analyzing and optimizing access patterns during compilation. The compiler examines the program's memory access patterns in advance and generates optimized device address mappings that anticipate future accesses, reducing miss ratios while preserving the flexibility of random access patterns during execution.
Data Source
AI summary
Embodiments of the disclosure provide systems and methods for allocating memory space in a memory device. The system can include: a memory device for providing the memory space; and a compiler component configured for: receiving a request for allocating a data array having a plurality of data elements in the memory device, wherein each of the plurality of data elements has a logical address; generating an instruction for allocating memory space for the data array in the memory device based on the request; generating device addresses for the plurality of data elements in the memory device based on logical addresses of the plurality of data elements; and allocating the memory space for the data array in the memory device based on the device addresses and the instruction.