Compiler for Multiprocessor Systems with Dynamic Voltage and Frequency Scaling
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Solution Overview
Problem
In multiprocessor systems with various types of processor units, achieving processing efficiency proportional to the number of units is challenging due to the need for manual generation of schedule information, which is labor-intensive and difficult for large programs or systems with many PUs, leading to increased power consumption and performance degradation.
Innovation Solution
A compiler that automatically extracts parallel tasks from input programs, schedules them based on processor characteristics, and generates codes to optimize system frequency and power supply voltage, reducing execution time and power consumption while maximizing processor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If manual schedule information generation is used for multiprocessor systems, then processing efficiency can be optimized for small systems, but labor intensity increases and scalability deteriorates for large programs or systems with many PUs
Solution Approach 1:
The compilation system performs automatic parallelization and schedule information generation without requiring manual intervention. The compiler analyzes the input program, identifies parallelizable tasks, and generates optimized schedules automatically, enabling the system to serve itself rather than requiring external manual configuration for each multiprocessor system
Solution Approach 2:
The system changes the parameter of schedule generation from manual to automatic by implementing a compilation system that performs static scheduling. This transforms the process from labor-intensive manual configuration to automated compiler-based generation, improving scalability while maintaining optimization capability
2Productivity
If the number of processor units is increased to improve performance, then arithmetic operation performance increases, but power consumption increases
Solution Approach 1:
The compilation system implements dynamic voltage and frequency adjustment based on the generated schedule. The operating frequency and supply voltage of each processor unit are dynamically changed according to the scheduled task requirements, allowing the system to reduce power consumption when full performance is not needed while maintaining high performance when required
Solution Approach 2:
The compilation system performs preliminary static scheduling to determine the optimal execution schedule before runtime. By pre-calculating the schedule and determining the required frequency and voltage for each time slot, the system can proactively adjust power parameters to minimize consumption while ensuring performance requirements are met, rather than reacting to runtime conditions
3Productivity
If processor operation frequency is increased to improve performance, then arithmetic operation performance improves, but power consumption and heat generation increase
Solution Approach 1:
The system dynamically adjusts the operating frequency of processor units based on the scheduled tasks. The compilation system generates schedules that specify frequency requirements for different time slots, and the runtime system adjusts frequencies accordingly, maintaining high frequency only when necessary for computation and reducing frequency during idle or low-demand periods to minimize heat generation
Data Source
AI summary
Provided is a multiprocessor system and a compiler used in the system for automatically extracting tasks having parallelism from an input program to be processed, performing scheduling to efficiently operate processor units by arranging the tasks according to characteristics of the processor units, and generating codes for optimizing a system frequency and a power supply voltage by estimating a processing amount of the processor units.