Compiler Offload Splitting for MIC Asynchronous Execution

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Solution Overview

Problem

Existing methods for offloading tasks to Many Integrated Core (MIC) processors require significant developer effort to achieve asynchronous execution without suspending CPU execution, as they need to ensure no dependencies between code regions and optimal load distribution, which can be time-consuming and inefficient.

Innovation Solution

A source-to-source compiler optimization that automatically splits parallel loops into sub-loops for asynchronous offloading, allowing concurrent execution on MIC and CPU by dynamically determining the optimal split boundary and handling reduction variables and shared memory, enabling true parallelism and minimizing idle time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If developer manually identifies and marks parallel code regions using #pragma offload directives, then offloadable tasks can be generated for MIC execution, but significant developer effort and time are required

Engineering Contradiction:
Improveautomatic task identificationVSAvoiddeveloper effort time
Core Design Contradiction:
Extent of automationVSLoss of time

Solution Approach 1:

The compiler performs automatic analysis of the application code to identify parallel code regions that can be offloaded to MIC, eliminating the need for manual developer intervention. The system serves itself by autonomously detecting suitable code regions, analyzing dependencies, and generating offload directives without requiring developer time or effort.

Inventive Principle:
Principle #25Self-service

2Productivity

If synchronous offloading is used where CPU execution is suspended until offloaded code completes, then simplicity of implementation is maintained, but application performance is degraded due to idle CPU time

Engineering Contradiction:
Improveapplication performanceVSAvoidCPU idle time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system dynamically switches between synchronous and asynchronous offloading modes based on runtime conditions. The compiler generates code that can adaptively choose execution modes, allowing the system to optimize performance by minimizing CPU idle time while maintaining correctness. This dynamic approach enables the CPU to continue executing other tasks during offloaded code execution when appropriate.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The offloading mechanism is segmented into synchronous and asynchronous modes, allowing different code regions to use different execution models. The compiler analyzes dependencies and selectively applies asynchronous offloading to independent code regions while maintaining synchronous execution for dependent regions, thereby reducing overall CPU idle time.

Inventive Principle:
Principle #1Segmentation

3Productivity

If asynchronous offloading is implemented to avoid CPU suspension, then CPU can execute other tasks concurrently, but complexity increases due to need for dependency analysis and load distribution optimization

Engineering Contradiction:
Improveconcurrent execution capabilityVSAvoiddependency analysis complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The compiler performs preliminary static analysis of the application code during compilation to identify parallel code regions, analyze dependencies, and generate appropriate offload directives. By performing this analysis beforehand, the runtime system can execute asynchronous offloading without needing to perform complex dependency analysis during execution, thereby reducing runtime complexity while maintaining concurrent execution capability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8997073B2Semi-automatic restructuring of offloadable tasks for accelerators
Publication Date: 2015.03.31 NEC CORP
  • US8997073B2 patent drawing
  • US8997073B2 patent drawing
  • US8997073B2 patent drawing

AI summary

A computer implemented method entails identifying code regions in an application from which offloadable tasks can be generated by a compiler for heterogenous computing system with processor and accelerator memory, including adding relaxed semantics to a directive based language in the heterogenous computing for allowing a suggesting rather than specifying a parallel code region as an offloadable candidate, and identifying one or more offloadable tasks in a neighborhood of code region marked by the directive.