Compiler for Removing Overlapping Branches in Reconfigurable Logic

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Solution Overview

Problem

Existing software programs with overlapping logic branches often inhibit or degrade the performance of reconfigurable logic, as certain systems cannot reliably execute such programs.

Innovation Solution

A method and system that modify software programs to eliminate or reduce overlapping conditional branching by identifying and replacing specific patterns of overlapping branches with logically equivalent sets of instructions, allowing the software to be executed by reconfigurable logic circuitry.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If software programs with overlapping logic branches are executed on reconfigurable logic, then the program functionality is preserved, but the performance and reliability of the reconfigurable logic deteriorates

Engineering Contradiction:
Improvereliability of reconfigurable logic executionVSAvoidcomplexity of conditional branching structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the overlapping conditional branches into separate, non-overlapping execution paths. By dividing the complex branching logic into distinct segments that execute sequentially rather than overlapping, the system eliminates the reliability issues caused by simultaneous branch evaluation while preserving the original program's logical functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary action by pre-processing the software program to identify and resolve overlapping branches before execution on reconfigurable logic. The compilation process performs ahead-of-time analysis to detect overlapping conditional structures and transforms them into equivalent non-overlapping forms, ensuring reliable execution without runtime overhead.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If overlapping conditional branches are eliminated from software programs, then the compatibility with reconfigurable logic improves, but the complexity of the code transformation process increases

Engineering Contradiction:
Improvecompatibility with reconfigurable logicVSAvoidcomplexity of code modification process
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary compilation process that acts as a mediator between the original software program and the reconfigurable logic execution environment. This intermediary compiler automatically performs the complex transformation of eliminating overlapping branches, shielding the user from the complexity while ensuring compatibility with reconfigurable logic systems.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the parameters of the conditional branching structure by transforming overlapping branches into non-overlapping equivalents. The compilation process modifies control flow parameters, branch target addresses, and conditional evaluation sequences to eliminate overlaps while maintaining logical equivalence, thereby improving adaptability to reconfigurable logic.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the source software program is modified to reduce overlapping branches, then the execution reliability on reconfigurable logic improves, but the time required for code compilation increases

Engineering Contradiction:
Improveexecution reliability on reconfigurable logicVSAvoidcompilation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs the complex analysis and transformation of overlapping branches as a preliminary action during the compilation phase, before the program is deployed to reconfigurable logic. By completing all necessary modifications ahead of time, the system ensures reliable execution without incurring time penalties during runtime, and the compilation overhead is paid only once during deployment.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9477470B2System and method for compiling machine-executable code generated from a sequentially ordered plurality of processor instructions
Publication Date: 2016.10.25 ASCEMIUM CORP
  • US9477470B2 patent drawing
  • US9477470B2 patent drawing
  • US9477470B2 patent drawing

AI summary

A method and system are provided for deriving a resultant software program from an originating software program having overlapping branches, wherein the resultant software project has either no overlapping branches or fewer overlapping branches than the originating software program. A preferred embodiment of the invented method generates a resultant software program that has no overlapping branches. The resultant software is more easily converted into programming reconfigurable logic than the originating software program. Separate and individually applicable aspects of the invented method are used to eliminate all four possible states of two overlapping branches, i.e., forward branch overlapping forward branch, back branch overlapping back branch, and each of the two possible and distinguishable states of forward branch and back branch overlap. One or more elements of each aspect of the invention may be performed by one or more computers or processors, or by means of a computer or a communications network.