Compiler Auto-Parallelization Latency Optimization
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Solution Overview
Problem
Current compiler systems face challenges in efficiently managing multiple processors and data dependency for higher throughput in multi-processor systems, particularly in optimizing parallelization and minimizing latency, which is complex due to issues like data locality, synchronization, and communication overhead.
Innovation Solution
A compiler system that translates source code into parallel processing code by partitioning it into computation block nodes, using matrices to optimize latency times, and generating optimized machine code for multiple processing units, employing numerical matrix optimization techniques to minimize aggregated latency and enhance parallel processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If code is parallelized across multiple processors, then throughput is improved, but latency increases due to data exchange between processors
Solution Approach 1:
The patent segments code into computation blocks that can be independently executed on different processors. By dividing the code into smaller, self-contained blocks with explicit data exchange points, the system achieves better parallelization while controlling latency through localized data transfer between processors rather than global communication overhead.
Solution Approach 2:
The patent performs preliminary analysis of data dependencies and communication requirements during code compilation. By pre-identifying which data needs to be exchanged between processors and when, the system optimizes data transfer timing and reduces idle waiting time, thereby minimizing latency while maintaining high throughput.
2Productivity
If automatic parallelization is implemented, then productivity is improved, but device complexity increases due to compiler system requirements
Solution Approach 1:
The patent introduces an intermediary compilation layer that translates high-level code into an intermediate representation with explicit parallelization annotations. This intermediary layer handles the complexity of parallelization logic separately from the final machine code generation, making the compiler system more manageable while still achieving automatic parallelization and high processing efficiency.
3Productivity
If more processors are added to the system, then throughput increases, but communication overhead increases
Solution Approach 1:
The patent assigns different computation blocks to different processors based on local data availability and computation requirements. By optimizing the distribution of computation blocks to minimize inter-processor data transfer and exploiting local memory hierarchies, the system achieves high throughput with reduced communication overhead and energy consumption.
Data Source
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AI summary
Compiler system (1) for optimized compiling of a computer program (31) for execution by a parallel processing system (2) having a plurality of processing units (21) and corresponding method. The compiler system (1) comprises means for translating a source programming language of the computer program (31) into a machine code (32) as target programming language thereby generating an optimized processing code (32) comprising a number of instructions executable by the plurality of processing units (21) of the parallel processing system (2) or controlling the operation of the plurality of processing units (21).